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24CSM01 数据表(PDF) 32 Page - Microchip Technology |
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24CSM01 数据表(HTML) 32 Page - Microchip Technology |
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32 / 63 page ![]() 24CSM01 DS20006781B -page 32 Preliminary 2023 Microchip Technology Inc. and its subsidiaries 10.4 Locking the Security Register The user-programmable portion of the Security register can be permanently inhibited from future writing with the lock operation. The status of the lock state can be determined from the check lock operation. 10.4.1 LOCK OPERATION The lock operation is an irreversible sequence that will permanently prevent all future writing to the upper 256 bytes of the Security register. Once the lock operation has been executed, the entire 512-byte Security register becomes read-only. The lock operation protocol emulates a byte write operation to the Security register, however, the A11 through A8 bits of the word address must be set to ‘0110b’ (6h). The remaining bits of the word address and the data bytes are “don’t care” bits. Even though these bits are “don’t care” bits, they still must be transmitted to the device. If the remaining bits are not transmitted, this will cause the write cycle to abort and the Security register to remain unlocked. ACK responses to the word address and data byte indicate the Security register is not currently locked. A NACK response indicates the Security register region is already locked. Refer to Section 10.4.2 “Determining the Lock State of the Security Register” for details about determining the lock status of the Security register. The sequence completes with a Stop condition being sent to the device, which initiates a self-timed internal write cycle. The lock operation will conclude upon completion of that write cycle, subsequently making the Security register permanently read-only. FIGURE 10-3: SECURITY REGISTER LOCK OPERATION Note: Once the Security register has been locked, it cannot be unlocked. Note: The lock operation cannot be inhibited by asserting the Write-Protect pin. Refer to Section 6.6 “Write Protection”, which describes the device behavior with respect to the Write-Protect pin status. MSb MSb 1 2 3 456 7 8 9 1 2 3 45 6 7 8 9 Device Address Byte Word Address – Byte 0 10 1 1 0 0x x x x A2 A1 x0 1 1 0 0 ACK from Client ACK from Client Start by Host MSb MSb 1 2 3 4 5 6 7 8 9 123 45 6 7 8 9 Word Address – Byte 1 Data Byte xx x x 0 x xx x x xx x x x xx0 ACK from Client ACK from Client Stop by Host SCL SDA |
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