24CSM01 datasheet(7/63 Pages) MICROCHIP

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 2023 Microchip Technology Inc. and its subsidiaries

Preliminary

DS20006781B

-page 7

24CSM01

1.1

Power-Up Requirements and

Reset Behavior

During a power-up sequence, the VCC supplied to the

24CSM01 should monotonically rise from VSS to the

minimum VCC level, as specified in Table 1-1, with a

slew rate no faster than 0.1 V/µs.

1.1.1

DEVICE RESET

To prevent write operations or other spurious events

from happening during a power-up sequence, the

24CSM01 includes a Power-on Reset (POR) circuit.

Upon power-up, the device will not respond to any

commands until the VCC level crosses the internal

voltage threshold (VPOR) that brings the device out of

Reset and into Standby mode.

The system designer must ensure that instructions are

not sent to the device until the VCC supply has reached

a stable value greater than or equal to the minimum

VCC level. Additionally, once the VCC is greater than or

equal to the minimum VCC level, the host must wait at

least TPUP before sending the first command to the

device. See Table 1-4 for the values associated with

these power-up parameters.

If an event occurs in the system where the VCC level

supplied to the 24CSM01 drops below the maximum

VPOR level specified, it is recommended that a

full-power cycle sequence be performed by first driving

the VCC pin to VSS, waiting at least the minimum TPOFF

time and then perform a new power-up sequence in

compliance

with

the

requirements

defined

Section 1.1 “Power-Up Requirements and Reset

Behavior”.

TABLE 1-4:

POWER-UP CONDITIONS

Symbol

Parameter

Min.

Max.

Units

TPUP

Time required after VCC is stable before the device can accept commands

100

—

µs

VPOR

Power-on Reset threshold voltage

—

1.5

TPOFF

Minimum time at VCC = 0V between power cycles

—

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