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24CSM01 数据表(PDF) 36 Page - Microchip Technology |
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24CSM01 数据表(HTML) 36 Page - Microchip Technology |
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36 / 63 page ![]() 24CSM01 DS20006781B -page 36 Preliminary 2023 Microchip Technology Inc. and its subsidiaries 12.0 DEVICE DEFAULT CONDITION The 24CSM01 is delivered with the EEPROM array set to logic ‘1’, resulting in FFh data in all locations of the EEPROM memory array. The Security register contains a preprogrammed, 128-bit serial number in the lower 16 bytes. The user-programmable portion (lockable ID page) is unlocked and is set to logic ‘1’, resulting in 256 bytes of FFh data. The Configuration register is set for Legacy Hardware Write Protection mode (EWPM = ‘0’) and is unlocked. |
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