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ENC28J60-C/ML 数据表(PDF) 23 Page - Microchip Technology |
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ENC28J60-C/ML 数据表(HTML) 23 Page - Microchip Technology |
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23 / 96 page  © 2006 Microchip Technology Inc. Preliminary DS39662B-page 21 ENC28J60 REGISTER 3-3: MICMD: MII COMMAND REGISTER U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 — — — — — — MIISCAN MIIRD bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-2 Unimplemented: Read as ‘0’ bit 1 MIISCAN: MII Scan Enable bit 1 = PHY register at MIREGADR is continuously read and the data is placed in MIRD 0 = No MII Management scan operation is in progress bit 0 MIIRD: MII Read Enable bit 1 = PHY register at MIREGADR is read once and the data is placed in MIRD 0 = No MII Management read operation is in progress REGISTER 3-4: MISTAT: MII STATUS REGISTER U-0 U-0 U-0 U-0 R-0 R-0 R-0 R-0 — — — — r NVALID SCAN BUSY bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-4 Unimplemented: Read as ‘0’ bit 3 Reserved: Maintain as ‘0’ bit 2 NVALID: MII Management Read Data Not Valid bit 1 = The contents of MIRD are not valid yet 0 = The MII Management read cycle has completed and MIRD has been updated bit 1 SCAN: MII Management Scan Operation bit 1 = MII Management scan operation is in progress 0 = No MII Management scan operation is in progress bit 0 BUSY: MII Management Busy bit 1 = A PHY register is currently being read or written to 0 = The MII Management interface is Idle |
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