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CS8420-CSZ 数据表(PDF) 69 Page - Cirrus Logic

部件名 CS8420-CSZ
功能描述  DIGITAL AUDIO SAMPLE RATE CONVERTER
PDF  94 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS8420-CSZ 数据表(HTML) 69 Page - Cirrus Logic

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DS245F4
69
CS8420
13.5.1
Pin Description - Hardware Mode 4
Overall Device Control:
DFC0, DFC1 - Data Flow Control Inputs
DFC0 and DFC1 inputs determine the major data flow options available in Hardware mode, according to Table 5.
Audio Input Interface:
SDIN - Serial Audio Input Port Data Input
Audio data serial input pin. This data will be transmitted out the AES3 port.
ISCLK - Serial Audio Input Port Bit Clock Input or Output
Serial bit clock for audio data on the SDIN pin.
ILRCK - Serial Audio Input Port Left/Right Clock Input or Output
Word rate clock for the audio data on the SDIN pin. The frequency will be at the input sample rate (Fsi)
APMS - Serial Audio Input Port Master or Slave
APMS should be connected to VD+ to set serial audio input port as a master, or connected to DGND to set the port
as a slave.
Audio Output Interface:
SDOUT - Serial Audio Output Port Data Output
Audio data serial output pin. This is also a start-up option pin, and requires a pull-up or pull-down resistor.



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