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CSG14K_CSG8K 数据表(PDF) 99 Page - OSRAM GmbH |
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CSG14K_CSG8K 数据表(HTML) 99 Page - OSRAM GmbH |
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99 / 114 page  Document Feedback CSG14K_CSG8K Functional Description Datasheet • PUBLIC DS000571 • v2-01 • 2023-Feb-10 113 │ 98 7.8.5 OTP Memory A non-volatile, one time programmable memory is provided on-chip. This is programmed with unique device ID and temperature sensor calibration data from both temperature sensors. During manufacturing, both temperature sensors are read out from the SPI registers in a controlled environment temperature. The data is then written to the OTP memory. The OTP memory is organized in 64 addresses of 8 bits each. Only the following registers are useful for end users. Figure 126: OTP Memory Map OTP Cell Name Address Bits Description Version 0 [7:0] Highest bit denotes the version TSENS1_CONV_MSB 22 [7:0] Temperature sensor SPI value read when wafer testing at 60 ⁰C. These values can be used for calibrating the temperature sensor. Data from top temperature sensor. TSENS1_CONV_LSB 23 [7:0] TSENS1_REF_MSB 24 [7:0] TSENS1_REF_LSB 25 [7:0] TSENS2_CONV_MSB 26 [7:0] Data for bottom temperature sensor. TSENS2_CONV_LSB 27 [7:0] TSENS2_REF_MSB 28 [7:0] TSENS2_REF_LSB 29 [7:0] Chuck Temperature 30 [7:0] Temperature of wafer during production testing. Should be used for temperature calibration. Resolution 31 [7:0] Denotes 8 K or 14 K resolution. 0b 0000 0000 = Virgin state 0b 0000 0001 = 14 K full resolution 0b 0000 0011 = 8 K resolution 0b 0000 01xx = 14 K full resolution 0b 0000 11xx = 8 K resolution 0b 0001 xxxx = 14 K full resolution 0b 0011 xxxx = 8 K resolution 0b 01xx xxxx = 14 K full resolution 0b 11xx xxxx = 8 K resolution Readout of the OTP registers requires interfacing with following SPI registers. Figure 127: OTP SPI Registers Reg. Name Bank Addr Bits Description OTP_CONTROL 3 24 [11:0] OTP control register OTP_A 3 26 [8:0] OTP address OTP_DOUT 3 28 [7:0] OTP data out |
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