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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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CSG14K_CSG8K 数据表(PDF) 31 Page - OSRAM GmbH |
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CSG14K_CSG8K 数据表(HTML) 31 Page - OSRAM GmbH |
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31 / 114 page  Document Feedback CSG14K_CSG8K Functional Description Datasheet • PUBLIC DS000571 • v2-01 • 2023-Feb-10 113 │ 30 and write operations act on the bottom sequencer A (which has BLOCK_ID 0). The BLOCK_SEL register is always accessible, regardless of the currently selected bank. Figure 25: The BLOCK ID The different blocks contain a certain subset of the total register bank, meaning that not every register is present in every block. This is denoted with REGa, REGb, REGc, and REGd in the figure above. Section 8 gives an overview of all registers that are included in every block. A register (on a specific address) is always present in at least one block. If the register is present in multiple blocks, then each block hold a unique copy of that register, allowing it to be programmed differently in each of these blocks. The sensor supports a broadcast mode where all blocks are written at once. This is done by setting the BLOCK_SEL register to 255. This allows faster configuration as not every block has to be programmed individually. Blocks that do not contain the currently addressed register ignore the write operation, i.e. broadcasting does not overwrite anything in blocks that do not have the currently addressed register. Registers are unique per address. This means that a register (with a certain name) is present on the same address in all blocks that contain this register. For blocks that do not contain this register, the address points to nothing. In this case, write operations are ignored and read operations return all zeros. SEQ A REGa SPI DPP1 REGb REGb REGc REGd SEQ A REGa DPP1 REGb OB REGc SEQ B REGd ID 0 ID 18 ID 20 ID 0 ID 2, 4, 6 .. 16 ID 19 ID 21 ID 1 ID 3, 5, 7 .. 17 Internally distributed DPP8 REGb OB SEQ B DPP8 Sensor |
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