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PPC440EP 数据表(PDF) 53 Page - Applied Micro Circuits Corporation |
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PPC440EP 数据表(HTML) 53 Page - Applied Micro Circuits Corporation |
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53 / 84 page ![]() AMCC Proprietary 53 440EP – PPC440EP Embedded Processor Data Sheet Revision 1.26 – April 25, 2007 External Slave Peripheral Interface DMAAck0:3 Used by the PPC440EP to indicate that data transfers have occurred. O Multiplex DMAReq0:3 Used by slave peripherals to indicate they are prepared to transfer data. I Multiplex 1, 5 EOT0:3/TC0:3 End Of Transfer/Terminal Count. I/O Multiplex 1, 3 PerAddr02:07 Peripheral address bus used by PPC440EP when not in external master mode, otherwise used by external master. I/O 3.3V LVTTL 1, 2 PerAddr08:31 Peripheral address bus used by PPC440EP when not in external master mode, otherwise used by external master. I/O 3.3V LVTTL PerBLast Used by either the peripheral controller, DMA controller, or external master to indicate the last transfer of a memory access. I/O 3.3V LVTTL 1, 4 PerCS0:5 External peripheral device select. O 3.3V LVTTL 2 PerData00:15 Peripheral data bus used by PPC440EP when not in external master mode, otherwise used by external master. Note: PerData00 is the most significant bit (msb) on this bus. I/O 3.3V LVTTL 1 PerOE Used by either peripheral controller or DMA controller depending upon the type of transfer involved. When the PPC440EP is the bus master, it enables the selected device to drive the bus. O3.3V LVTTL 2 PerReady Used by a peripheral slave to indicate it is ready to transfer data. I3.3V LVTTL PerR/W Used by the PPC440EP when not in external master mode, as output by either the peripheral controller or DMA controller depending upon the type of transfer involved. High indicates a read from memory, low indicates a write to memory. Otherwise, it used by the external master as an input to indicate the direction of transfer. I/O 3.3V LVTTL 1, 2 PerWBE0:1 External peripheral data bus byte enables. I/O 3.3V LVTTL 1, 2 PerErr External Error. Used as an input to record external slave peripheral errors. I/O 3.3V LVTTL 1, 5 Table 6. Signal Functional Description (Sheet 4 of 9) Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3k Ω to 3.3V) 3. Must pull down (recommended value is 1k Ω) 4. If not used, must pull up (recommended value is 3k Ω to 3.3V) 5. If not used, must pull down (recommended value is 1k Ω) 6. Strapping input during reset; pull-up or pull-down required Signal Name Description I/O Type Notes |
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