PPC440EP datasheet(57/84 Pages) AMCC

57 / 84 page

AMCC Proprietary

440EP – PPC440EP Embedded Processor

Data Sheet

Revision 1.26 – April 25, 2007

System Interface

SysClk

Main system clock input.

Clock

3.3V tolerant

2.5V CMOS

SysErr

Set to 1 when a machine check is generated.

3.3V tolerant

2.5V CMOS

SysReset

Main system reset. External logic can drive this bidirectional

pin low (minimum of 16 cycles) to initiate a system reset. A

system reset can also be initiated by software. Implemented as

an open-drain output (two states; 0 or open circuit).

I/O

3.3V tolerant

2.5V CMOS

1, 2

Halt

Halt from external debugger.

3.3V LVTTL

1, 4

TmrClk

Processor timer external input clock.

3.3V tolerant

2.5V CMOS

GPIO00:63

General purpose I/O 0 through 63. To access these functions,

software must set DCR register bits.

I/O

Multiplex

TestEn

Test Enable.

3.3V LVTTL

RcvrInh

Receiver Inhibit. Active only when TestEn is active. Used for

manufacturing test only.

Multiplex

ModeCtrl

Mode Control. Active only when TestEn is active. Used for

manufacturing test only.

Multiplex

LeakTest

Leakage Test. Active only when TestEn is active. Used for

manufacturing test only.

Multiplex

RefEn

Reference Enable. Active only when TestEn is active. Used for

manufacturing test only.

Multiplex

DrvrInh1

Driver Inhibit. Active only when TestEn is active. Used for

manufacturing test only.

3.3V tolerant

2.5V CMOS

DrvrInh2

Driver Inhibit. Active only when TestEn is active. Used for

manufacturing test only.

3.3V LVTTL

PSROOut

Module characterization and screening. Use for test purposes

only. Tie down as specified in Note 3 for normal operation.

Perf screen

ring osc

1, 3

Table 6. Signal Functional Description (Sheet 8 of 9)

Notes:

1. Receiver input has hysteresis

2. Must pull up (recommended value is 3k

Ω to 3.3V)

3. Must pull down (recommended value is 1k

Ω)

4. If not used, must pull up (recommended value is 3k

Ω to 3.3V)

5. If not used, must pull down (recommended value is 1k

Ω)

6. Strapping input during reset; pull-up or pull-down required

Signal Name

Description

I/O

Type

Notes

PPC440EP 数据表(PDF) 57 Page - Applied Micro Circuits Corporation

PPC440EP 数据表(HTML) 57 Page - Applied Micro Circuits Corporation

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数据表下载

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PPC440EP 数据表(PDF) 57 Page - Applied Micro Circuits Corporation

PPC440EP 数据表(HTML) 57 Page - Applied Micro Circuits Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

数据表 下载

链接网址

数据表下载