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PPC440EP 数据表(PDF) 58 Page - Applied Micro Circuits Corporation |
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PPC440EP 数据表(HTML) 58 Page - Applied Micro Circuits Corporation |
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58 / 84 page ![]() 58 AMCC Proprietary 440EP – PPC440EP Embedded Processor Revision 1.26 – April 25, 2007 Data Sheet Trace Interface TrcBS0:2 Trace branch execution status. I/O 3.3V tolerant 2.5V CMOS TrcClk Trace data capture clock, runs at 1/4 the frequency of the processor. O 3.3V tolerant 2.5V CMOSL TrcES0:4 Trace Execution Status is presented every fourth processor clock cycle. I/O 3.3V tolerant 2.5V CMOS TrcTS0:6 Additional information on trace execution and branch status. I/O 3.3V tolerant 2.5V CMOS Power VDD 1.5V supply—Logic voltage. na na OVDD 3.3V supply—I/O (except DDR SDRAM, Ethernet). na na SVDD 2.5V supply—SDRAM, Ethernet. na na GND Ground. na na AVDD 1.5V—Filtered voltage for system PLLs (analog). na na AGND PLL (analog) voltage ground. na na SAVDD 1.5V—Filtered voltage for memory PLL (analog). na na SAGND PLL (analog) memory voltage ground. na na Table 6. Signal Functional Description (Sheet 9 of 9) Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3k Ω to 3.3V) 3. Must pull down (recommended value is 1k Ω) 4. If not used, must pull up (recommended value is 3k Ω to 3.3V) 5. If not used, must pull down (recommended value is 1k Ω) 6. Strapping input during reset; pull-up or pull-down required Signal Name Description I/O Type Notes |
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