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PPC440EP 数据表(PDF) 65 Page - Applied Micro Circuits Corporation

部件名 PPC440EP
功能描述  Power PC 440EP Embedded Processor
PDF  84 Pages
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制造商  AMCC [Applied Micro Circuits Corporation]
网页  http://www.amcc.com
标志 AMCC - Applied Micro Circuits Corporation

PPC440EP 数据表(HTML) 65 Page - Applied Micro Circuits Corporation

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AMCC Proprietary
65
440EP – PPC440EP Embedded Processor
Data Sheet
Revision 1.26 – April 25, 2007
I/O Specifications
Table 15. Peripheral Interface Clock Timings
Parameter
Min
Max
Units
Notes
PCIClk input frequency (asynchronous mode)
–
66.66
MHz
PCIClk period (asynchronous mode)
15
–
ns
PCIClk input high time
40% of nominal period
60% of nominal period
ns
PCIClk input low time
40% of nominal period
60% of nominal period
ns
EMCMDClk output frequency
–
2.5
MHz
EMCMDClk period
400
–
ns
EMCMDClk output high time
160
–
ns
EMCMDClk output low time
160
–
ns
EMCTxClk input frequency MII(RMII)
2.5(5)
25(50)
MHz
EMCTxClk period MII(RMII)
40(20)
400(200)
ns
EMCTxClk input high time
35% of nominal period
–
ns
EMCTxClk input low time
35% of nominal period
–
ns
EMCRxClk input frequency MII(RMII)
2.5(5)
25(50)
MHz
EMCRxClk period MII(RMII)
40(20)
400(200)
ns
EMCRxClk input high time
35% of nominal period
–
ns
EMCRxClk input low time
35% of nominal period
–
ns
PerClk (and OPB clock) output frequency (for ext. master or
sync. slaves)
–66.66
MHz
PerClk period
15
–
ns
PerClk output high time
50% of nominal period
66% of nominal period
ns
PerClk output low time
33% of nominal period
50% of nominal period
ns
UARTSerClk input frequency
–
1000/(2TOPB
1+2ns)
MHz
1
UARTSerClk period
2TOPB+2
–ns
1
UARTSerClk input high time
TOPB+1
–ns
1
UARTSerClk input low time
TOPB+1
–ns
1
USB2Clk input frequency
60
60
MHz
USB1Clk input frequency
48
48
MHz



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