TMP86FS28DFG datasheet(41/272 Pages) TOSHIBA

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Page 29

TMP86FS28DFG

(2) Switching from SLOW1 mode to NORMAL2 mode

Note: After SYSCK is cleared to “0”, executing the instructions is continiued by the low-frequency clock

for the period synchronized with low-frequency and high-frequency clocks.

First, set SYSCR2<XEN> to turn on the high-frequency oscillation. When time for stabilization

(Warm up) has been taken by the timer/counter (TC4,TC3), clear SYSCR2<SYSCK> to switch the

main system clock to the high-frequency clock.

SLOW mode can also be released by inputting low level on the RESET pin. After releasing reset, the

operation mode is started from NORMAL1 mode.

Example :Switching from the SLOW1 mode to the NORMAL2 mode (fc = 16 MHz, warm-up time is 4.0 ms).

SET

(SYSCR2). 7

; SYSCR2<XEN>

← 1 (Starts high-frequency oscillation)

(TC3CR), 63H

; Sets mode for TC4, 3 (16-bit mode, fc for source)

(TC4CR), 05H

; Sets warming-up counter mode

(TTREG4), 0F8H

; Sets warm-up time

; IMF

← 0

SET

(EIRE). 5

; Enables INTTC4

; IMF

← 1

SET

(TC4CR). 3

; Starts TC4, 3

PINTTC4:

CLR

(TC4CR). 3

; Stops TC4, 3

CLR

(SYSCR2). 5

; SYSCR2<SYSCK>

← 0

(Switches the main system clock to the high-frequency clock)

RETI

VINTTC4:

PINTTC4

; INTTC4 vector table

High-frequency clock

Low-frequency clock

Main system clock

SYSCK

TMP86FS28DFG 数据表(PDF) 41 Page - Toshiba Semiconductor

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