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TMP86FS28DFG 数据表(PDF) 99 Page - Toshiba Semiconductor |
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TMP86FS28DFG 数据表(HTML) 99 Page - Toshiba Semiconductor |
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99 / 272 page  Page 87 TMP86FS28DFG 8.1.3.2 External Trigger Timer Mode In the external trigger timer mode, the up-counter starts counting by the input pulse triggering of the TC10 pin, and counts up at the edge of the internal clock. For the trigger edge used to start counting, either the rising or falling edge is defined in TC10CR<TC10S>. • When TC10CR<METT10> is set to “1” (trigger start and stop) When a match between the up-counter and the TC10DRA value is detected after the timer starts, the up-counter is cleared and halted and an INTTC10 interrupt request is generated. If the edge opposite to trigger edge is detected before detecting a match between the up- counter and the TC10DRA, the up-counter is cleared and halted without generating an interrupt request. Therefore, this mode can be used to detect exceeding the specified pulse by interrupt. After being halted, the up-counter restarts counting when the trigger edge is detected. • When TC10CR<METT10> is set to “0” (trigger start) When a match between the up-counter and the TC10DRA value is detected after the timer starts, the up-counter is cleared and halted and an INTTC10 interrupt request is generated. The edge opposite to the trigger edge has no effect in count up. The trigger edge for the next counting is ignored if detecting it before detecting a match between the up-counter and the TC10DRA. Since the TC10 pin input has the noise rejection, pulses of 4/fc [s] or less are rejected as noise. A pulse width of 12/fc [s] or more is required to ensure edge detection. The rejection circuit is turned off in the SLOW1/2 or SLEEP1/2 mode, but a pulse width of one machine cycle or more is required. Example 1 :Generating an interrupt 1 ms after the rising edge of the input pulse to the TC10 pin (fc =16 MHz) LDW (TC10DRA), 007DH ; 1ms ÷ 27/fc = 7DH DI ; IMF = “0” SET (EIRL). 7 ; Enables INTTC10 interrupt EI ; IMF = “1” LD (TC10CR), 00000100B ; Selects the source clock and mode LD (TC10CR), 00100100B ; Starts TC10 external trigger, METT10 = 0 Example 2 :Generating an interrupt when the low-level pulse with 4 ms or more width is input to the TC10 pin (fc =16 MHz) LDW (TC10DRA), 01F4H ; 4 ms ÷ 27/fc = 1F4H DI ; IMF = “0” SET (EIRL). 7 ; Enables INTTC10 interrupt EI ; IMF = “1” LD (TC10CR), 00000100B ; Selects the source clock and mode LD (TC10CR), 01110100B ; Starts TC10 external trigger, METT10 = 0 |
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