TMP86FS28DFG datasheet(81/272 Pages) TOSHIBA

81 / 272 page

Page 69

TMP86FS28DFG

5.9 Port P8 (P80 to P87)

Port P8 is an 8-bit input/output port that can also be used for LCD segment output.

A reset initializes the output latch (P8DR) to “1”, the Pch control (P8OUTCR) to “0”, and the LCD output control

To use a pin in Port P8 as an input port, set P8DR to “1” and then set the corresponding bit in P8LCR and

P8OUTCR to “0”.

To use a pin in Port P8 as an LCD segment output, set the corresponding bit in P8LCR to “1”.

The output circuit of Port P8 can be set either as sink open-drain output (“0”) or CMOS output (“1”) individually

for each bit in P8OUTCR.

Port P8 has a separate data input register. The output latch state can be read from the P8DR register, and the pin

state can be read from the P8PRD register.

Note: An asterisk (*) indicates that either “1” or “0” can be set.

Figure 5-10 Port P8

Table 5-11 Register Programming for Port P8 (P80 to P87)

Function

Port Input

P8DR

P8OUTCR

P8LCR

Port input

“1”

“0”

Port “0” output

“0”

Set as

appropriate.

“0”

Port “1” output

“1”

“0”

LCD segment output

“1”

Data input (P8PRD)

Output latch read (P8DR)

STOP

OUTEN

P8OUTCRi input

Data output (P8DR)

P8OUTCRi

P8i

Note) i = 7~0

LCD data output

P8LCRi

P8LCRi input

Output latch

TMP86FS28DFG 数据表(PDF) 81 Page - Toshiba Semiconductor

TMP86FS28DFG 数据表(HTML) 81 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载