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TMP86FS28DFG 数据表(PDF) 68 Page - Toshiba Semiconductor |
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TMP86FS28DFG 数据表(HTML) 68 Page - Toshiba Semiconductor |
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68 / 272 page ![]() Page 56 5. I/O Ports 5.2 Port P1 (P10 to P17) TMP86FS28DFG Figure 5-3 Port P1 Note 1: Pins set to input mode read the pin input data. Therefore, when both input and output modes are used in Port P1, the contents of the output latch of a pin set to input mode may be overwritten by a bit manipulation instruction. Note 2: For a pin used as an analog input, be sure to clear the corresponding bit in P1CR2 to "0" to prevent flow-through current. Note 3: For a pin used as an analog input, do not set P1CR1 to "1" (port output) to prevent the pin from becoming shorted with an external signal. Note 4: Pins not used as analog inputs can be used as input/output pins. During AD conversion, however, output instruc- tions must not be executed to ensure the accuracy of conversion results. Also, during AD conversion, do not input signals that fluctuate widely to pins near analog input pins. Data output (P1DR) Data input (P1DR) STOP OUTEN AINDS SAIN P1CR2i input P1CR1i input P CR2i P1CR1i P1i Note 1) i = 0, 1, 6, 7 : j = 2~5 : k = 2~5 Note 2) STOP = bit 7 in SYSCR1 Note 3) SAIN = AD input select signal Note 4) STOPk = input select signal for key-on wake-up Key-on wake-up Data output (P1DR) Data input (P1DR) STOP STOPk OUTEN AINDS SAIN P1CR2j input P1CR1j input P1CR2j P1CR1j P1j DQ DQ DQ DQ DQ DQ Analog input Analog input |
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