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TMP86FS28DFG 数据表(PDF) 73 Page - Toshiba Semiconductor

部件名 TMP86FS28DFG
功能描述  8 Bit Microcontroller
PDF  272 Pages
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TMP86FS28DFG 数据表(HTML) 73 Page - Toshiba Semiconductor

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TMP86FS28DFG
5.5 Port P4 (P40 to P47)
Port P4 is an 8-bit input/output port that can also be used for external interrupt input, PPG output, timer/counter
input, or LCD segment output.
A reset initializes the output latch (P4DR) to “1”, the Pch control (P4OUTCR) to “0”, and the LCD output control
register (P4LCR) to “0”.
To use a pin in Port P4 as an input port, external interrupt input, or timer/counter input, set P4DR to “1” and then
set the corresponding bit in P4LCR and P4OUTCR to “0”.
To use a pin in Port P4 as an LCD segment output, set the corresponding bit in P4LCR to “1”.
To use a pin in Port P4 as a PPG output, set P4DR to “1” and then set the corresponding bit in P4LCR to “0”.
The output circuit of Port P4 can be set either as sink open-drain outut (“0”) or CMOS output (“1”) individually for
each bit in P4OUTCR.
Port P4 has a separate data input register. The output latch state can be read from the P4DR register, and the pin
state can be read from the P4PRD register.
Note: An asterisk (*) indicates that either “1” or “0” can be set.
Figure 5-6 Port P4
Table 5-7 Register Programming for Port P4 (P40 to P47)
Function
Programmed Value
P4DR
P4OUTCR
P4LCR
Port input, external interrupt input,
timer/counter input
“1”
“0”
“0”
Port "0" output
“0”
Set as
appropriate.
“0”
Port “1” output
“1”
“0”
PPG output
“1”
“0”
LCD segment output
*
*
“1”
Data input (P4PRD)
Output latch read (P4DR)
STOP
OUTEN
P4OUTCRi input
Data output (P4DR)
P4OUTCRi
P4i
Note) i = 7~0
DQ
DQ
LCD data output
P4LCRi
DQ
P4LCRi input
Control output
Control input
Output latch



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