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TMP86FS28DFG 数据表(PDF) 97 Page - Toshiba Semiconductor |
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TMP86FS28DFG 数据表(HTML) 97 Page - Toshiba Semiconductor |
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97 / 272 page ![]() Page 85 TMP86FS28DFG Note 4: Auto-capture can be used only in the timer, event counter, and window modes. Note 5: To set the timer registers, the following relationship must be satisfied. TC10DRA > TC10DRB > 1 (PPG output mode), TC10DRA > 1 (other modes) Note 6: Set TFF10 to “0” in the mode except PPG output mode. Note 7: Set TC10DRB after setting TC10M to the PPG output mode. Note 8: When the STOP mode is entered, the start control (TC10S) is cleared to “00” automatically, and the timer stops. After the STOP mode is exited, set the TC10S to use the timer counter again. Note 9: Use the auto-capture function in the operative condition of TC10. A captured value may not be fixed if it's read after the execution of the timer stop or auto-capture disable. Read the capture value in a capture enabled condition. Note 10:Since the up-counter value is captured into TC10DRB by the source clock of up-counter after setting TC10CR<ACAP10> to "1". Therefore, to read the captured value, wait at least one cycle of the internal source clock before reading TC10DRB for the first time. 8.1.3 Function TimerCounter 10 has six types of operating modes: timer, external trigger timer, event counter, window, pulse width measurement, programmable pulse generator output modes. 8.1.3.1 Timer mode In the timer mode, the up-counter counts up using the internal clock. When a match between the up-counter and the timer register 1A (TC10DRA) value is detected, an INTTC10 interrupt is generated and the up-counter is cleared. After being cleared, the up-counter restarts counting. Setting TC10CR<ACAP10> to “1” captures the up-counter value into the timer register 1B (TC10DRB) with the auto-capture function. Use the auto-capture function in the operative condition of TC10. A captured value may not be fixed if it's read after the execution of the timer stop or auto-capture disable. Read the capture value in a capture enabled condition. Since the up-counter value is captured into TC10DRB by the source clock of up- counter after setting TC10CR<ACAP10> to "1". Therefore, to read the captured value, wait at least one cycle of the internal source clock before reading TC10DRB for the first time. Table 8-1 Internal Source Clock for TimerCounter 10 (Example: fc = 16 MHz, fs = 32.768 kHz) TC10CK NORMAL1/2, IDLE1/2 mode SLOW, SLEEP mode DV7CK = 0 DV7CK = 1 Resolution [ µs] Maximum Time Setting [s] Resolution [ µs] Maximum Time Setting [s] Resolution [ µs] Maximum Time Set- ting [s] 00 128 8.39 244.14 16.0 244.14 16.0 01 8.0 0.524 8.0 0.524 – – 10 0.5 32.77 m 0.5 32.77 m – – Example 1 :Setting the timer mode with source clock fc/211 [Hz] and generating an interrupt 1 second later (fc = 16 MHz, TBTCR<DV7CK> = “0”) LDW (TC10DRA), 1E84H ; Sets the timer register (1 s ÷ 211/fc = 1E84H) DI ; IMF = “0” SET (EIRL). 7 ; Enables INTTC10 EI ; IMF = “1” LD (TC10CR), 00000000B ; Selects the source clock and mode LD (TC10CR), 00010000B ; Starts TC10 |
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