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TMP86FS28DFG 数据表(PDF) 208 Page - Toshiba Semiconductor |
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TMP86FS28DFG 数据表(HTML) 208 Page - Toshiba Semiconductor |
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208 / 272 page ![]() Page 196 16. LCD Driver 16.2 Control TMP86FS28DFG 16.2.2 Frame frequency Frame frequency (fF) is set according to driving method and base frequency as shown in the following Table 16-1. The base frequency is selected by LCDCR<SLF> according to the frequency fc and fs of the basic clock to be used. Note: fc: High-frequency clock [Hz] Note: fs: Low-frequency clock [Hz] Table 16-1 Setting of LCD Frame Frequency (a) At the single clock mode. At the dual clock mode (DV7CK = 0). SLF Base frequency [Hz] Frame frequency [Hz] 1/4 Duty 1/3 Duty 1/2 Duty Static 00 (fc = 16 MHz) 122 163 244 122 (fc = 8 MHz) 61 81 122 61 01 (fc = 8 MHz) 122 163 244 122 (fc = 4 MHz) 61 81 122 61 10 (fc = 4 MHz) 122 163 244 122 (fc = 2 MHz) 61 81 122 61 11 (fc = 1 MHz) 122 163 244 122 Table 16-2 (b) At the dual clock mode (DV7CK = 1 or SYSCK = 1) SLF Base frequency [Hz] Frame frequency [Hz] 1/4 Duty 1/3 Duty 1/2 Duty Static 00 (fs = 32.768 kHz) 64 85 128 64 01 (fs = 32.768 kHz) 128 171 256 128 fc 2 17 -------- fc 2 17 -------- 4 3 --- fc 2 17 -------- • 4 2 --- fc 2 17 -------- • fc 2 17 -------- fc 2 16 -------- fc 2 16 -------- 4 3 --- fc 2 16 -------- • 4 2 --- fc 2 16 -------- • fc 2 16 -------- fc 2 15 -------- fc 2 15 -------- 4 3 --- fc 2 15 -------- • 4 2 --- fc 2 15 -------- • fc 2 15 -------- fc 2 13 -------- fc 2 13 -------- 4 3 --- fc 2 13 -------- • 4 2 --- fc 2 13 -------- • fc 2 13 -------- fs 2 9 ------ fs 2 9 ------ 4 3 --- fs 2 9 ------ • 4 2 --- fs 2 9 ------ • fs 2 9 ------ fs 2 8 ------ fs 2 8 ------ 4 3 --- fs 2 8 ------ • 4 2 --- fs 2 8 ------ • fs 2 8 ------ |
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