AD4056BCPZ-R2 datasheet(27/67 Pages) AD

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Data Sheet

AD4050/AD4056

THEORY OF OPERATION

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Rev. A | 27 of 67

Chop Control Signal

The AD4050/AD4056 include a control signal called CHOP that

can be used as the control signal for an auto-zero amplifier that

employs chopping in applications that require very low 1/f noise and

offset error. The CHOP signal ensures the synchronization of the

auto-zero amplifier's chopping and the ADC's sampling, removing

the need for complex digital synchronization in the firmware.

The CHOP signal low-to-high and high-to-low transitions occur

every K ADC conversions, where K is a power of 2 and is set by the

CHOP_WIN_LEN bit field as defined in Table 43 and the following

equation:

K=2CHOP_WIN_LENGTH

(3)

fCHOP= fS2

2CHOP_WIN_LENGTH

= fS2K

(4)

For example, when CHOP_WIN_LENGTH = 0, and K = 1, the

CHOP signal frequency is half of the ADC sampling frequency (fS).

In this case, the CHOP signal transitions from low to high at the end

of one ADC conversion, and then from high to low at the end of the

next ADC conversion completing one CHOP cycle. Because each

CHOP cycle lasts for two ADC conversion periods, the auto-zero

amplifier's chopping frequency is a half of the ADC sampling rate.

The CHOP signal low-to-high and high-to-low transitions occur

following the end of a conversion as shown in Figure 42. When the

CHOP signal low-to-high and high-to-low transitions occur, the au-

to-zero amplifier's output sees glitching that needs to settle before

the next ADC convert start. Synchronization of the ADC sampling

and the auto-zero amplifier's chopping by the internal CHOP signal

minimizes the error from these glitches by maximizing the allowed

settling time for these glitches before the next ADC convert start.

The CHOP signal can be enabled by configuring either the GP0 or

GP1 pin as the CHOP output (see Table 41).

The CHOP signal and the device enable signal (DEV_EN) cannot

be enabled at the same time.

Figure 55, Figure 56, and Figure 57 in the Modes of Operation sec-

tion show timing diagrams of the CHOP signal transitions relative to

the CNV rising edge in sample mode, averaging mode, and burst

averaging mode, respectively. The CHOP signal is not supported in

the autonomous modes.

Figure 42. Typical Application Circuit with CHOP Signal

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