Data Sheet

AD4050/AD4056

TABLE OF CONTENTS

analog.com

Rev. A | 2 of 67

Features................................................................ 1

Applications........................................................... 1

General Description...............................................1

Functional Block Diagram......................................1

Specifications........................................................ 4

Timing Specifications......................................... 7

Absolute Maximum Ratings.................................10

Thermal Resistance......................................... 10

Electrostatic Discharge (ESD) Ratings.............10

ESD Caution.....................................................10

Pin Configuration and Function Descriptions.......11

Typical Performance Characteristics................... 13

Terminology......................................................... 18

Theory of Operation.............................................19

Overview.......................................................... 19

Converter Operation.........................................19

Analog Inputs................................................... 21

Voltage Reference............................................21

Digital Processing Features............................. 22

Internal Timer................................................... 23

Power Supplies................................................ 23

Comparator Operation......................................23

Interrupts and Control Signals..........................25

Modes of Operation............................................. 29

Sample Mode................................................... 31

Averaging Mode............................................... 32

Burst Averaging Mode......................................33

DEV_EN Timing Diagrams...............................34

CHOP Timing Diagrams...................................35

Autonomous Modes......................................... 35

Sleep Mode...................................................... 38

Serial Interface.................................................... 39

Configuration Mode..........................................39

ADC Mode Output Data Format....................... 42

Device Reset....................................................43

Applications Information...................................... 45

Typical Applications Diagram........................... 45

Analog Front-End Design.................................46

Reference Circuit Design................................. 47

Synchronized Amplifier Shutdown and ADC

Sampling........................................................ 48

Achieving High Accuracy with Reference

Shutdown....................................................... 48

VDD Power Dissipation.................................... 50

Calculating Serial Interface Output Data

Rate................................................................51

Layout Recommendations................................52

Register Summary...............................................53

Register Details................................................... 54

Interface Configuration A Register................... 54

Interface Configuration B Register................... 54

Device Configuration Register..........................54

Device Type Register....................................... 55

Product Identification (LSByte) Register.......... 55

Product Identification (MSByte) Register......... 55

Device Grade Register..................................... 55

Scratch Pad Register....................................... 56

Vendor Identification (LSByte) Register........... 56

Vendor Identification (MSByte) Register.......... 56

Reserved Registers..........................................57

Interface Configuration C Register................... 57

Interface Status Register..................................57

Device Mode Select Register........................... 58

ADC Operating Mode Configuration Register.. 58

ADC Setup Configuration Register...................59

Averaging Filter Configuration Register........... 59

General Purpose Pin Configuration Register... 60

Interrupt Configuration Register....................... 61

Chop Signal Configuration Register................. 61

Timer Configuration Register........................... 62

Maximum Threshold Configuration Register.... 63

Minimum Threshold Configuration Register..... 63

Maximum Threshold Hysteresis Register.........63

Minimum Threshold Hysteresis Register..........63

MON_VAL Scaling Register............................. 64

Fuse CRC Register.......................................... 64

Device Status Register.....................................64

Maximum Interrupt Sample Register................65

Minimum Interrupt Sample Register.................65

Outline Dimensions............................................. 66

Ordering Guide.................................................66

Evaluation Boards............................................ 67

REVISION HISTORY

11/2024—Rev. 0 to Rev. A

Changes to Table 22......................................................................................................................................53

Changes to Product Identification (LSByte) Register Section and Table 27.................................................. 55

Changes to Table 40......................................................................................................................................60

Changes to Ordering Guide........................................................................................................................... 66