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AD4056BCPZ-R2 数据表(PDF) 62 Page - Analog Devices |
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AD4056BCPZ-R2 数据表(HTML) 62 Page - Analog Devices |
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62 / 67 page ![]() Data Sheet AD4050/AD4056 REGISTER DETAILS analog.com Rev. A | 62 of 67 Table 43. Bit Descriptions for CHOP_CONFIG (Continued) Bits Bit Name Description Reset Access 0x7: 128. 0x8: 256. 0x9: 512. 0xA: 1024. 0xB: 2048. TIMER CONFIGURATION REGISTER Address: 0x27, Reset: 0x00, Name: TIMER_CONFIG Table 44. Bit Descriptions for TIMER_CONFIG Bits Bit Name Description Reset Access [7:4] FS_BURST_AUTO 1 Sample Rate Selection for Burst and Autonomous Modes. 0x0 R/W 0x0: 2 MSPS. 0x1: 1 MSPS. 0x2: 300 kSPS. 0x3: 100 kSPS. 0x4: 33.3 kSPS. 0x5: 10 kSPS. 0x6: 3 kSPS. 0x7: 1 kSPS. 0x8: 500 SPS. 0x9: 333 SPS. 0xA: 250 SPS. 0xB: 200 SPS. 0xC: 166 SPS. 0xD: 140 SPS. 0xE: 125 SPS. 0xF: 111 SPS. [3:0] TIMER_PWR_ON DEV_EN Power-On Timer Setting. Selects the delay between DEV_EN assertion and ADC sampling instant when DEV_EN is selected for either GP0 or GP1 pins. 0x0 R/W 0x0: 500 ns. 0x1: 1 µs. 0x2: 3.3 µs. 0x3: 10 µs. 0x4: 30 µs. 0x5: 100 µs. 0x6: 330 µs. 0x7: 1 ms. 0x8: 2 ms. 0x9: 3 ms. 0xA: 4 ms. 0xB: 5 ms. 0xC: 6 ms. 0xD: 7 ms. |
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