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AD4056BCPZ-R2 数据表(PDF) 42 Page - Analog Devices |
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AD4056BCPZ-R2 数据表(HTML) 42 Page - Analog Devices |
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42 / 67 page ![]() Data Sheet AD4050/AD4056 SERIAL INTERFACE analog.com Rev. A | 42 of 67 ADC MODE OUTPUT DATA FORMAT This section describes the SPI output data format for the ADC modes described in the Modes of Operation section (sample mode, averaging mode, burst averaging mode, and trigger mode). The output word consists of the ADC results (ADC_DATA) and optional sign extension (SE_BYTE) and CRC bytes (CRC). The output word length is always an integer multiple of bytes to ensure compatibility with digital host serial interface and data packet transfers (such as DMA), which are often segmented into integer multiples of bytes. Figure 64 shows all supported formats for sample and trigger modes, and Figure 65 shows all supported formats for averaging and burst averaging modes. In sample and trigger modes, the ADC_DATA are 12 bits long with 4 bits of sign extension for a total of 16 bits (2 bytes). In averaging and burst averaging mode, the ADC_DATA are 14 bits long with 2 bits of sign extension (SE_BITS) for a total of 16 bits (2 bytes) . The ADC_DATA are either twos complement or straight binary depending on the DATA_FORMAT bit setting (see the Transfer Function section). Sign-Extension Byte The optional SE_BYTE allows the AD4050/AD4056 output word length to match the digital host data transfer size, if needed. When enabled, a byte of MSB sign-extension is added to the ADC data. For example, the default ADC output word length in burst averaging mode with the CRC byte enabled is 3 bytes. However, the SE_BYTE can convert the output word to 4 bytes for direct compatibility with a 4-byte DMA transfer. The ADC_DATA are right-justified to maintain the integer values without bit-shifting in software. The SE_BYTE is enabled by setting the SIGN_EXT_EN bit to 1. The SE_BYTE is disabled by default. ADC CRC When the CRC is enabled, an 8-bit checksum code is appended to the ADC result on the SDO pin. The CRC checksum is calculated using the same polynomial given in Equation 6 with the SDO data as the input and a seed value of 0xA5 for all reads. The CRC is enabled with the CRC_EN and CRC_EN_B bit fields, as described in the Register Access CRC section. The CRC is disabled by default. Figure 64. SPI Data Formats for Sample Mode and Trigger Mode Figure 65. SPI Data Formats for Averaging Mode and Burst Averaging Mode |
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