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PIC16F1507-E/SS. 数据表(PDF) 197 Page - Microchip Technology

部件名 PIC16F1507-E/SS.
功能描述  20-Pin Flash, 8-Bit Microcontrollers
PDF  278 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC16F1507-E/SS. 数据表(HTML) 197 Page - Microchip Technology

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DS40001586D-page 197
PIC16(L)F1507
CALL
Call Subroutine
Syntax:
[ label ] CALL k
Operands:
0
 k  2047
Operation:
(PC)+ 1
 TOS,
k
 PC<10:0>,
(PCLATH<6:3>)
 PC<14:11>
Status Affected:
None
Description:
Call Subroutine. First, return address
(PC + 1) is pushed onto the stack.
The 11-bit immediate address is
loaded into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH. CALL is a 2-cycle instruc-
tion.
CALLW
Subroutine Call With W
Syntax:
[ label ] CALLW
Operands:
None
Operation:
(PC) +1
 TOS,
(W)
 PC<7:0>,
(PCLATH<6:0>)
PC<14:8>
Status Affected:
None
Description:
Subroutine call with W. First, the
return address (PC + 1) is pushed
onto the return stack. Then, the con-
tents of W is loaded into PC<7:0>,
and the contents of PCLATH into
PC<14:8>. CALLW is a 2-cycle
instruction.
CLRF
Clear f
Syntax:
[ label ] CLRF
f
Operands:
0
 f  127
Operation:
00h
 (f)
1
 Z
Status Affected:
Z
Description:
The contents of register ‘f’ are cleared
and the Z bit is set.
CLRW
Clear W
Syntax:
[ label ] CLRW
Operands:
None
Operation:
00h
 (W)
1
 Z
Status Affected:
Z
Description:
W register is cleared. Zero bit (Z) is
set.
CLRWDT
Clear Watchdog Timer
Syntax:
[ label ] CLRWDT
Operands:
None
Operation:
00h
 WDT
0
 WDT prescaler,
1
 TO
1
 PD
Status Affected:
TO, PD
Description:
CLRWDT
instruction resets the Watch-
dog Timer. It also resets the prescaler
of the WDT.
Status bits TO and PD are set.
COMF
Complement f
Syntax:
[ label ] COMF
f,d
Operands:
0
 f  127
d
 [0,1]
Operation:
(f)
 (destination)
Status Affected:
Z
Description:
The contents of register ‘f’ are com-
plemented. If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
DECF
Decrement f
Syntax:
[ label ] DECF f,d
Operands:
0
 f  127
d
 [0,1]
Operation:
(f) - 1
 (destination)
Status Affected:
Z
Description:
Decrement register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W
register. If ‘d’ is ‘1’, the result is stored
back in register ‘f’.



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