PIC16F1507-ESLASHSS. datasheet(93/278 Pages) MICROCHIP

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DS40001586D-page 93

PIC16(L)F1507

PMCON1: PROGRAM MEMORY CONTROL 1 REGISTER

U-1

R/W-0/0

R/W/HC-0/0

R/W/HC-x/q(2)

R/W-0/0

R/S/HC-0/0

—(1)

CFGS

LWLO

FREE

WRERR

WREN

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

S = Bit can only be set

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

HC = Bit is cleared by hardware

bit 7

Unimplemented:

Read as ‘1’

bit 6

CFGS:

Configuration Select bit

= Access Configuration, User ID and Device ID Registers

= Access Flash program memory

bit 5

LWLO:

Load Write Latches Only bit(3)

= Only the addressed program memory write latch is loaded/updated on the next WR command

= The addressed program memory write latch is loaded/updated and a write of all program memory write latches

will be initiated on the next WR command

bit 4

FREE:

Program Flash Erase Enable bit

= Performs an erase operation on the next WR command (hardware cleared upon completion)

= Performs a write operation on the next WR command

bit 3

WRERR:

Program/Erase Error Flag bit

= Condition indicates an improper program or erase sequence attempt or termination (bit is set automatically

on any set attempt (write ‘1’) of the WR bit).

= The program or erase operation completed normally.

bit 2

WREN:

Program/Erase Enable bit

= Allows program/erase cycles

= Inhibits programming/erasing of program Flash

bit 1

WR:

Write Control bit

= Initiates a program Flash program/erase operation.

The operation is self-timed and the bit is cleared by hardware once operation is complete.

The WR bit can only be set (not cleared) in software.

= Program/erase operation to the Flash is complete and inactive.

bit 0

RD:

Read Control bit

= Initiates a program Flash read. Read takes one cycle. RD is cleared in hardware. The RD bit can only be set

(not cleared) in software.

= Does not initiate a program Flash read.

Note

Unimplemented bit, read as ‘1’.

The WRERR bit is automatically set by hardware when a program memory write or erase operation is started (WR = 1).

The LWLO bit is ignored during a program memory erase operation (FREE = 1).

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