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PIC16F1507-E/SS. 数据表(PDF) 23 Page - Microchip Technology |
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PIC16F1507-E/SS. 数据表(HTML) 23 Page - Microchip Technology |
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23 / 278 page ![]() 2011-2015 Microchip Technology Inc. DS40001586D-page 23 PIC16(L)F1507 3.3.6 CORE FUNCTION REGISTERS SUMMARY The Core Function registers listed in Table 3-4 can be addressed from any Bank. TABLE 3-4: CORE FUNCTION REGISTERS SUMMARY Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets Bank 0-31 x00h or x80h INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory (not a physical register) xxxx xxxx uuuu uuuu x01h or x81h INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory (not a physical register) xxxx xxxx uuuu uuuu x02h or x82h PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000 x03h or x83h STATUS — — —TO PD ZDC C ---1 1000 ---q quuu x04h or x84h FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu x05h or x85h FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000 x06h or x86h FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu x07h or x87h FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000 x08h or x88h BSR — — —BSR<4:0> ---0 0000 ---0 0000 x09h or x89h WREG Working Register 0000 0000 uuuu uuuu x0Ah or x8Ah PCLATH — Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000 x0Bh or x8Bh INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 0000 0000 0000 Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations are unimplemented, read as ‘0’. |
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