PIC16F1507-ESLASHSS. datasheet(88/278 Pages) MICROCHIP

88 / 278 page

PIC16(L)F1507

DS40001586D-page 88

 2011-2015 Microchip Technology Inc.

EXAMPLE 10-3:

WRITING TO FLASH PROGRAM MEMORY (16 WRITE LATCHES)

; This write routine assumes the following:

; 1. 32 bytes of data are loaded, starting at the address in DATA_ADDR

; 2. Each word of data to be written is made up of two adjacent bytes in DATA_ADDR,

; stored in little endian format

; 3. A valid starting address (the least significant bits = 00000) is loaded in ADDRH:ADDRL

; 4. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F (common RAM)

;

BCF

INTCON,GIE

; Disable ints so required sequences will execute properly

BANKSEL

PMADRH

; Bank 3

MOVF

ADDRH,W

; Load initial address

MOVWF

PMADRH

;

MOVF

ADDRL,W

;

MOVWF

PMADRL

;

MOVLW

LOW DATA_ADDR

; Load initial data address

MOVWF

FSR0L

;

MOVLW

HIGH DATA_ADDR ; Load initial data address

MOVWF

FSR0H

;

BCF

PMCON1,CFGS

; Not configuration space

BSF

PMCON1,WREN

; Enable writes

BSF

PMCON1,LWLO

; Only Load Write Latches

LOOP

MOVIW

FSR0++

; Load first data byte into lower

MOVWF

PMDATL

;

MOVIW

FSR0++

; Load second data byte into upper

MOVWF

PMDATH

;

MOVF

PMADRL,W

; Check if lower bits of address are '00000'

XORLW

0x0F

; Check if we're on the last of 16 addresses

ANDLW

0x0F

;

BTFSC

STATUS,Z

; Exit if last of 16 words,

GOTO

START_WRITE

;

MOVLW

55h

; Start of required write sequence:

MOVWF

PMCON2

; Write 55h

MOVLW

0AAh

;

MOVWF

PMCON2

; Write AAh

BSF

PMCON1,WR

; Set WR bit to begin write

NOP

; NOP instructions are forced as processor

; loads program memory write latches

NOP

;

INCF

PMADRL,F

; Still loading latches Increment address

GOTO

LOOP

; Write next latches

START_WRITE

BCF

PMCON1,LWLO

; No more loading latches - Actually start Flash program

; memory write

MOVLW

55h

; Start of required write sequence:

MOVWF

PMCON2

; Write 55h

MOVLW

0AAh

;

MOVWF

PMCON2

; Write AAh

BSF

PMCON1,WR

; Set WR bit to begin write

NOP

; NOP instructions are forced as processor writes

; all the program memory write latches simultaneously

NOP

; to program memory.

; After NOPs, the processor

; stalls until the self-write process in complete

; after write processor continues with 3rd instruction

BCF

PMCON1,WREN

; Disable writes

BSF

INTCON,GIE

; Enable interrupts

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