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PIC16F1507-E/SS. 数据表(PDF) 104 Page - Microchip Technology |
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PIC16F1507-E/SS. 数据表(HTML) 104 Page - Microchip Technology |
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104 / 278 page  PIC16(L)F1507 DS40001586D-page 104 2011-2015 Microchip Technology Inc. TABLE 11-6: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB TABLE 11-7: SUMMARY OF CONFIGURATION WORD WITH PORTB REGISTER 11-11: WPUB: WEAK PULL-UP PORTB REGISTER(1),(2) R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 U-0 U-0 U-0 U-0 WPUB7 WPUB6 WPUB5 WPUB4 — — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-4 WPUB<7:4> : Weak Pull-up Register bits 1 = Pull-up enabled 0 = Pull-up disabled bit 3-0 Unimplemented: Read as ‘0’ Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled. 2: The weak pull-up device is automatically disabled if the pin is configured as an output. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page ANSELB — — ANSB5 ANSB4 — — — — 103 APFCON — — — — — — CLC1SEL NCO1SEL 96 LATB LATB7 LATB6 LATB5 LATB4 — — — — 103 OPTION_REG WPUEN INTEDG TMR0CS TMR0SE PSA PS<2:0> 133 PORTB RB7 RB6 RB5 RB4 — — — — 102 TRISB TRISB7 TRISB6 TRISB5 TRISB4 — — — — 102 WPUB WPUB7 WPUB6 WPUB5 WPUB4 — — — — 104 Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTB. Note 1: Unimplemented, read as ‘1’. Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0 Register on Page CONFIG1 13:8 — — — —CLKOUTEN BOREN<1:0> — 38 7:0 CP MCLRE PWRTE WDTE<1:0> — FOSC<1:0> Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by PORTB. |
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