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PIC16F1507-E/SS. 数据表(PDF) 128 Page - Microchip Technology

部件名 PIC16F1507-E/SS.
功能描述  20-Pin Flash, 8-Bit Microcontrollers
PDF  278 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC16F1507-E/SS. 数据表(HTML) 128 Page - Microchip Technology

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PIC16(L)F1507
DS40001586D-page 128
 2011-2015 Microchip Technology Inc.
15.4
ADC Acquisition Requirements
For the ADC to meet its specified accuracy, the charge
holding capacitor (CHOLD) must be allowed to fully
charge to the input channel voltage level. The Analog
Input model is shown in Figure 15-4. The source
impedance (RS) and the internal sampling switch (RSS)
impedance directly affect the time required to charge
the capacitor CHOLD. The sampling switch (RSS)
impedance varies over the device voltage (VDD), refer
to
Figure 15-4.
The
maximum
recommended
impedance for analog sources is 10 k
. As the
source impedance is decreased, the acquisition time
may be decreased. After the analog input channel is
selected (or changed), an ADC acquisition must be
done before the conversion can be started. To calculate
the minimum acquisition time, Equation 15-1 may be
used. This equation assumes that 1/2 LSb error is used
(1,024 steps for the ADC). The 1/2 LSb error is the
maximum error allowed for the ADC to meet its
specified resolution.
EQUATION 15-1:
ACQUISITION TIME EXAMPLE
TACQ
Amplifier Settling Time
Hold Capacitor Charging Time
Temperature Coefficient
++
=
TAMP
TC
TCOFF
++
=
2µs
TC
Temperature - 25°C
 0.05µs/°C


++
=
TC
CHOLD RIC
RSS
RS
++
 ln(1/2047)
=
12.5pF 1k
 7k 10k
++

ln(0.0004885)
=
1.72
=
µs
VAPPLIED 1e
Tc
RC
---------



VAPPLIED 1
1
2
n1
+
 1
--------------------------


=
VAPPLIED 1
1
2
n1
+
 1
--------------------------


VCHOLD
=
VAPPLIED 1e
TC
RC
----------



VCHOLD
=
;[1] VCHOLD charged to within 1/2 lsb
;[2] VCHOLD charge response to VAPPLIED
;combining [1] and [2]
The value for TC can be approximated with the following equations:
Solving for TC:
Therefore:
Temperature
50°C and external impedance of 10k
 5.0V VDD
=
Assumptions:
Note: Where n = number of bits of the ADC.
TACQ
2µs
1.72
µs
50°C- 25°C
 0.05µs/°C


++
=
4.97µs
=
Note 1:
The reference voltage (VRPOS) has no effect on the equation, since it cancels itself out.
2:
The charge holding capacitor (CHOLD) is not discharged after each conversion.
3:
The maximum recommended impedance for analog sources is 10 k
. This is required to meet the pin
leakage specification.



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