IP100A LF
Preliminary Data Sheet
72/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
11.5.11 MulticastFramesReceivedOk
Class............................. LAN I/O Registers, Statistics
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x7f
Default .......................... 0x00
Width ............................ 8 bits
BIT
BIT NAME
R/W
BIT DESCRIPTION
7..0
MulticastFrames-
ReceivedOk
R/W
Multicast Frames Received OK is the count of the number of
frames that are successfully received to a group destination
address other than the broadcast address (0xFFFFFFFFFFFF).
MulticastFramesReceivedOk does not include frames received
with frames too long, FCS, length or alignment errors, or frames
lost due to internal MAC sublayer error (i.e. overrun).
MulticastFramesReceivedOk will wrap around to zero after
reaching 0xFF. See IEEE 802.3 Clause 30.3.1.1.21.
An UpdateStats interrupt (UpdateStats bit within the IntStatus
register) will occur when MulticastFramesReceivedOk reaches a
value of 0xC0. MulticastFramesReceivedOk is enabled by writing
a logic 1 to the StatisticsEnable bit in the MACCtrl1 register.
A read of MulticastFramesReceivedOk also clears the register.
11.5.12 MulticastFramesTransmittedOk
Class............................. LAN I/O Registers, Statistics
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x7e
Default .......................... 0x00
Width ............................ 8 bits
BIT
BIT NAME
R/W
BIT DESCRIPTION
7..0
MulticastFrames-
TransmittedOk
R/W
Multicast Frames Transmitted OK is a count of the number of
frames that are successfully transmitted to a group destination
address other than the broadcast address (0xFFFFFFFFFFFF).
MulticastFramesTransmittedOk will wrap around to zero after
reaching 0xFF. See IEEE 802.3 Clause 30.3.1.1.18.
An UpdateStats interrupt (UpdateStats bit within the IntStatus
register) will occur when MulticastFramesTransmittedOk reaches a
value of 0xC0. MulticastFramesTransmittedOk is enabled by
writing a logic 1 to the StatisticsEnable bit in the MACCtrl1 register.
A read of MulticastFramesTransmittedOk also clears the register.
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