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L9963E 数据表(PDF) 72 Page - STMicroelectronics |
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L9963E 数据表(HTML) 72 Page - STMicroelectronics |
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72 / 184 page ![]() In case of wrong self test detection: • Corresponding fault flag is set and latched into BIST_COMP register • Fault is propagated through the FAULT Line • Voltage conversion routine goes into Configuration Override 4.11.15 Regulator current limitation Regulators VANA, VTREF, VCOM have dedicated current limitation features (refer to Table 45). 4.11.16 GPIO short FAULT When GPIO are configured as digital outputs, they are short-protected. GPIO output value is monitored via the input Schmitt Trigger. If it differs from the programmed GPOxOn for a time interval longer than TFILT_GPIO_ECHO, the short fault is detected. In case of short detection: • Corresponding fault flag is set and latched into GPOxshort register; • Fault is propagated through the FAULT Line; • Corresponding output buffer is put in HiZ. The output re-engagement strategy is: 1. Toggle GPOxOn bit; 2. Clear GPOxshort latch via SPI read; 3. Reprogram GPOxOn bit to the desired value. GPIO short detection is not available for GPIO9 when configured as SDO in SPI mode. 4.11.17 GPIO open fault (GPIO3-9) When GPIO are used as analog inputs, it is possible to detect if an open wire has occurred between the pin and the RNTC resistances on the board. To do this, a pulldown current IGPIO_PD_OPEN is turned on and, after TGPIO_OPEN_SET, GPIO voltage is converted with TCYCLEADC_000; if converted voltage is lower than a threshold VGPIO_OL, the open load detection occurs. This diagnostics is available just for GPIO3-9, if configured as analog input. In case of open detection (with GPIO configured as analog input): • Corresponding fault flag is set and latched into GPIOX_OPEN register; • Fault is propagated through the FAULT Line; • Voltage conversion routine goes into Configuration Override. In case connection to the external NTC is lost at the PCB connector, the GPIO is pulled up to VTREF, thus causing OV/UT failure when the GPIO is converted. MCU is responsible for programming an OV/UT threshold below VTREF, in order to catch such event. Figure 21 shows the equivalent series open resistance vs. temperature. The estimation has been made considering an NTC with R25°C and B = 3984 K. The calculation already accounts for the presence of the series filtering resistor and the BOM recommended in Table 83. Estimation of the GPIO open resistance in the NTC analog front end ROPEN=VTREF* RNTCT RNTCT +RPU IGPIO_PD_OPEN − RPU*RNTCT RPU+RNTCT −RFIL − VGPIO_OL IGPIO_PD_OPEN (12) L9963E Safety and diagnostic features DS13636 - Rev 12 page 72/184 |
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