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L9963E 数据表(PDF) 105 Page - STMicroelectronics |
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L9963E 数据表(HTML) 105 Page - STMicroelectronics |
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105 / 184 page ![]() Register Name Field name Description Noreg7 RO 7 1 0x0 X ThrTimedBalCell3 RW 0 7 0x0 A Timed balancing threshold for cell 3 Bal_8 0xA Noreg17 RO 17 1 0x0 X Noreg16 RO 16 1 0x0 X Noreg15 RO 15 1 0x0 X ThrTimedBalCell2 RW 8 7 0x0 A Timed balancing threshold for cell 2 Noreg7 RO 7 1 0x0 X ThrTimedBalCell1 RW 0 7 0x0 A Timed balancing threshold for cell 1 VCELL_THRESH_UV_ OV 0xB Noreg17 RO 17 1 0x0 X Noreg16 RO 16 1 0x0 X threshVcellOV RW 8 8 0x0 A Determines cell overvoltage threshold Cell Voltage ADC electrical characteristics See Table 39 threshVcellUV RW 0 8 0x0 A Determines cell undervoltage threshold See Table 39 VBATT_SUM_TH 0xC Noreg17 RO 17 1 0x0 X Noreg16 RO 16 1 0x0 X VBATT_SUM_OV_TH RW 8 8 0x0 A Determines battery stack overvoltage threshold See Table 40 VBATT_SUM_UV_TH RW 0 8 0x0 A Determines battery stack undervoltage threshold See Table 40 ADCV_CONV 0xD ADC_CROSS_CHECK RW 17 1 0x0 A 0 → Cell open diagnostics executed during Cx open check 1 → ADC Cross check executed during Cx open check TCYCLE_OVF RLR 16 1 0x0 B 0 → No period overflow detected during cyclic conversions 1 → Period overflow detected during cyclic conversions SOC WO 15 1 0x0 B 0 → No on-demand conversion 1 → Triggers on-demand conversion OVR_LATCH RLR 14 1 0x0 B 0 → No configuration override occurred L9963E Register map DS13636 - Rev 12 page 105/184 |
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