PAC1932SLASH3SLASH4 datasheet(41/62 Pages) MICROCHIP

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 2017-2018 Microchip Technology Inc.

DS20005850C-page 41

PAC1932/3/4

VPOWERN RESULT REGISTER: VPOWER1 (17H), VPOWER2 (18H), VPOWER3

(19H), VPOWER4 (1AH)

R-0

VPOWERn<27:20>

bit 31

bit 24

R-0

VPOWERn<19:12>

bit 23

bit 16

R-0

VPOWERn<11:4>

bit 15

bit 8

R-0

VPOWERn<3:0>

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writeable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-4

VPOWERn<27:0>

: these registers contain the product of VBUS (14 MSBs) and VSENSE which

represents Proportional Power for each channel.These are 28 bit unsigned numbers unless either VBUS

or VSENSE are configured to have a bipolar range. In that case they will be 28-bit two's complement

(signed) numbers.These are the numbers that are accumulated in the accumulators.

Note that power is always calculated using signed numbers for VBUS and VSENSE, but if both VBUS and

VSENSE are in the default unipolar mode, power is reported as an unsigned number. This can lead to

very small discrepancies between a manual comparison of the product of VBUS and VSENSE and the

results that the chip calculates for VPOWER.The digital math in the chip uses more bits than the reported

results for VBUS and VSENSE, so the results registers for VPOWER and Accumulated Power will in some

cases have a more accurate number than calculations using the results registers for VSENSE and VBUS

will provide.

bit 3-0

Not used at this time, always reads ‘0’.

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