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PAC1932/3/4 数据表(PDF) 48 Page - Microchip Technology

部件名 PAC1932/3/4
功能描述  Multi-Channel DC Power/Energy Monitor with Accumulator
PDF  62 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PAC1932/3/4 数据表(HTML) 48 Page - Microchip Technology

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PAC1932/3/4
DS20005850C-page 48
 2017-2018 Microchip Technology Inc.
bit 3
0
= Channel 1 VBUS ADC converts 0 to +32V range with 16-bit straight binary output
1
= Channel 1 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output
bit 2
0
= Channel 2 VBUS ADC converts 0 to +32V range with 16-bit straight binary output
1
= Channel 2 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output
bit 1
0
= Channel 3 VBUS ADC converts 0 to +32V range with 16-bit straight binary output
1
= Channel 3 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output
bit 0
0
= Channel 4 VBUS ADC converts 0 to +32V range with 16-bit straight binary output
1
= Channel 4 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output
REGISTER 6-18:
CTRL_LAT REGISTER (ADDRESS 24H)
R-0R-0
R-0R-0
R-0R-0
R-0R-0
Sample_Rate<1:0>
SLEEP
SING
ALERT_PIN
ALERT_CC
OVF ALERT
OVF
bit 7
bit 0
Legend:
R = Readable bit
W = Writeable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = bit is set
‘0’ = Bit is cleared
x = Bit is unknown
This register contains an image of the Register 6-15 CTRL_ACT Register (Address 21h). The bits in this register
reflect the value of these settings that was active before the most recent REFRESH command (including REFRESH_V
and/or REFRESH_G). The values in register 01h may have been programmed but not activated by one of the
REFRESH commands, and the values in 21h are currently active. This register allows software to determine the actual
active setting that was active prior to the most recent REFRESH command and therefore corresponds to the dataset
that is held in the readable registers. This register is valid when the Results registers are valid, 1 ms after a
REFRESH/_V/_G command.
bit 7-6
Sample_Rate<1:0>
: shows the value of these settings that was latched prior to the most recent
REFRESH command (including REFRESH_V and/or REFRESH_G)
00b
= 1024 samples/s
01b
= 256 samples/s
10b
= 64 samples/s
11b
= 8 samples/s
bit 5
SLEEP
: shows the value of these settings that was latched prior to the most recent REFRESH
command (including REFRESH_V and/or REFRESH_G).
0
= Active mode
1
= SLEEP mode, no data conversion
bit 4
SING
: shows the value of these settings that was latched prior to the most recent REFRESH command
(including REFRESH_V and/or REFRESH_G).
0
= Sequential scan mode
1
= Single-shot mode
bit 3
ALERT_PIN
: the value of these settings that was latched prior to the most recent REFRESH command
(including REFRESH_V and/or REFRESH_G).
0
= Disable the ALERT pin function
1
= Enable the ALERT pin function
bit 2
ALERT_CC
: shows the value of these settings that was latched prior to the most recent REFRESH
command (including REFRESH_V and/or REFRESH_G) for the ALERT_CC bit.
0
= No ALERT on Conversion Cycle Complete
1
= ALERT function asserted for 5 μS on each completion of the conversion cycle
REGISTER 6-17:
NEG_PWR_ACT (ADDRESS 23H) (CONTINUED)



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