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PAC1932/3/4 数据表(PDF) 42 Page - Microchip Technology |
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PAC1932/3/4 数据表(HTML) 42 Page - Microchip Technology |
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42 / 62 page ![]() PAC1932/3/4 DS20005850C-page 42 2017-2018 Microchip Technology Inc. REGISTER 6-10: CHANNEL_DIS AND SMBUS (ADDRESS 1CH) RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 U CH1_OFF CH2_OFF CH3_OFF CH4_OFF TIMEOUT BYTE COUNT NO SKIP — bit 7 bit 0 Legend: R = Readable bit W = Writeable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-4 CHn_OFF<7:4> : allows one or more channels to be inactive during the conversion cycle. These settings apply for normal continuous round-robin conversion cycles or Single-Shot mode, if Single-Shot mode is selected. Note that if a channel is set to inactive, the auto incrementing address pointer will skip addresses associated with that channel unless the Pointer Skipping bit 1 in this register is set. Changes to bits 7-4 do not take effect until a REFRESH, REFRESH_V, or REFRESH_G command are sent. Changes to bits 3-1 take place as soon as a new value is written, they are not gated by a REFRESH command like most other control bits. bit 7 0 = CH1 ON. Channel 1 active during conversion cycle 1 = CH1 OFF. Channel 1 inactive during conversion cycle bit 6 0 = CH1 ON. Channel 2 active during conversion cycle 1 = CH1 OFF. Channel 2 inactive during conversion cycle bit 5 0 = CH1 ON. Channel 3 active during conversion cycle 1 = CH1 OFF. Channel 3 inactive during conversion cycle (for PAC1932 and PAC1933, this bit is set to 1 with factory trim and cannot be written) bit 4 0 = CH1 ON. Channel 4 active during conversion cycle 1 = CH1 OFF. Channel 4 inactive during conversion cycle (for PAC1933, this bit is set to 1 with factory trim and cannot be written) bit 3 TIMEOUT : Timeout enable bit. The SMBus timeout is disabled by default, and is enabled by setting this bit. 0 = No SMBus timeout feature 1 = SMBus timeout feature is available. bit 2 BYTE COUNT : causes Byte Count data to be included in the response to the SMBus Block Read command for each register read. This functionality is disabled by default, and Block Read corresponds to I2C protocol. 0 = No Byte Count in response to a Block Read command 1 = Data in response to a Block Read command includes the Byte Count data bit 1 NO SKIP : controls the auto-incrementing of the address pointer for channels that are inactive. 0 = The auto-incrementing pointer will skip over addresses used by/for channels that are inactive. 1 = The auto-incrementing pointer will not skip over addresses used by/for channels that are inactive. With this setting, these channels that are disabled will read 0xFF if read. bit 0 Unimplemented bits always read ‘0’. |
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