PAC1932SLASH3SLASH4 datasheet(50/62 Pages) MICROCHIP

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PAC1932/3/4

DS20005850C-page 50

 2017-2018 Microchip Technology Inc.

NEG_PWR _LAT (ADDRESS 26H)

R-0R-0

CH1_BIDI

CH2_BIDI

CH3_BIDI

CH4 BIDI

CH1_BIDV

CH2_BIDV

CH3_BIDV

CH4_BIDV

bit 7

bit 0

Legend:

R = Readable bit

W = Writeable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = bit is set

‘0’ = Bit is cleared

x = Bit is unknown

This register contains an image of the Register 6-17 NEG_PWR_ACT (Address 23h).The bits in this register reflect

the value of these settings that was active before the most recent REFRESH command (including REFRESH_V and/or

REFRESH_G). The values in register 1Dh may have been programmed but not activated by one of the REFRESH

commands, and the values in 23h are currently active. This register allows software to determine the actual active

setting that was active prior to the most recent REFRESH command and therefore corresponds to the dataset that is

held in the readable registers. This register is valid when the Results registers are valid, 1 ms after a REFRESH/_V/_G

command.

bit 7-4

CHn_BIDI<7:4>

: the value of these settings that was latched prior to the most recent REFRESH

command (including REFRESH_V and/or REFRESH_G).

bit 3-0

CHn_BIDV<3:0>

: the value of these settings that was latched prior to the most recent REFRESH

command (including REFRESH_V and/or REFRESH_G).

bit 7

= Channel 1 VSENSE ADC converts 0 to +100mV range with 16-bit straight binary output

= Channel 1 VSENSE ADC converts -100mV to +100mV range with 16 bit two’s complement output

bit 6

= Channel 2 VSENSE ADC converts 0 to +100mV range with 16-bit straight binary output

= Channel 2 VSENSE ADC converts -100mV to +100mV range with 16-bit two’s complement output

bit 5

= Channel 3 VSENSE ADC converts 0 to +100mV range with 16-bit straight binary output

= Channel 3 VSENSE ADC converts -100mV to +100mV range with 16-bit two’s complement output

bit 4

= Channel 4 VSENSE ADC converts 0 to +100mV range with 16-bit straight binary output

= Channel 4 VSENSE ADC converts -100mV to +100mV range with 16-bit two’s complement output

bit 3

= Channel 1 VBUS ADC converts 0 to +32V range with 16-bit straight binary output

= Channel 1 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output

bit 2

= Channel 2 VBUS ADC converts 0 to +32V range with 16-bit straight binary output

= Channel 2 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output

bit 1

= Channel 3 VBUS ADC converts 0 to +32V range with 16-bit straight binary output

= Channel 3 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output

bit 0

= Channel 4 VBUS ADC converts 0 to +32V range with 16-bit straight binary output

= Channel 4 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output

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