EV5424-R-00A datasheet(20/44 Pages) MPS

20 / 44 page

MP5424

– 5V POWER MANAGEMENT IC WITH I2C AND MTP

MP5424 Rev. 1.0

MonolithicPower.com

12/6/2021

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

Configurable MTP

Follow the steps below to configure the MTP e-

fuse via the I2C interface:

Before configuring the e-fuse, ensure that all of

the buck converters and LDOs have no load.

2. Write the correct MTP program password to

3. Set ENTER_MTP_MODE to 1 to enter MTP

configure mode. All bucks and LDOs are

turned off in this mode.

4. Write the desired content to the I2C registers.

5. Set VIN1 and VAVIN between 6.4V and 6.5V,

with a minimum 150mA current capability.

6. Set PROGRAM_MTP to 1 to start the MTP

e-fuse program.

7. The PMIC calculates the sum of all the

related I2C registers to be burned to the MTP

to the MTP register.

8. After the MTP write operation is complete

(typically

100ms),

the

PMIC

sets

the

PROGRAM_MTP bit to 0, and the I2C

write

protection

unlocked.

ENTER_MTP_MODE is also set to 0.

9. After MTP configuration, the PMIC reloads

the MTP to the related I2C registers and the

PWRON pin function is re-enabled. Then the

bucks, LDOs, and load switch then start-up

based

their

power-on

factors.

I2C

communication is enabled after the start-up

sequence is complete.

10. Decrease VIN1 and VAVIN below 5.5V, then

restart the power supply to resume normal

operation.

Before loading the MTP data into the I2C register

during a start-up through VIN, the PMIC does a

checksum calculation for all of the related MTP

registers,

and

compares

the

checksum

calculation to the checksum byte. If they match,

then the MTP data is loaded into the I2C register.

If they do not match, then the I2C register uses

the hard-coded default value. There is an I2C

Shutdown Sequence

If the VINx drops below its UVLO falling threshold

or if thermal shutdown is triggered, then the

PMIC enters the shutdown sequence. All of the

DC/DC converters, LDO regulators, and load

switch turn off at the same time.

RSTO

DC/DC1

DC/DCx

LDOx

LSWO

...

Shutdown

Event

Detected

Figure 7: Shutdown Sequence

High-Efficiency Buck Converter

Buck 1, buck 2, buck 3, and buck 4 are

synchronous, step-down DC/DC converters that

have built-in UVLO protection, soft start (SS),

compensation,

and

over-current

protection

(OCP) with hiccup mode. Constant-on-time

(COT) control with fixed frequency provides fast

transient response. The switching clock is

phase-shifted from buck 1 to buck 4 during

continuous conduction mode (CCM). All of the

buck converters can support a 100% duty cycle.

Power Supply and Under-Voltage Lockout

(UVLO) Protection

VIN1 is the power supply for buck 1. VIN2 is the

power supply for buck 2, LDO2. VIN3 is the

power supply for buck 3. VIN4 is the power

supply for buck 4. VIN5 is the power supply for

LDO 4 and LDO 5. LSWI is the power supply for

load switch. AVIN is the power input to bias the

internal logic blocks.

VIN1, VIN2, VIN3, VIN4, VIN5, and AVIN have

their own UVLO thresholds with hysteresis.

Once VAVIN exceeds its UVLO rising threshold,

the PWRON logic is enabled and ready to accept

start-up and shutdown commands.

Internal Soft Start (SS)

SS is implemented to prevent the PMIC VOUT

from overshooting during start-up. As the PMIC

starts up, the internal circuitry of each power rail

generates a soft-start voltage (VSS) that ramps

up from 0V. The soft-start time (tSS) lasts until VSS

EV5424-R-00A 数据表(PDF) 20 Page - Monolithic Power Systems

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