MP5424

– 5V POWER MANAGEMENT IC WITH I2C AND MTP

MP5424 Rev. 1.0

MonolithicPower.com

35

12/6/2021

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2021 MPS. All Rights Reserved.

I2C REGISTER MAP

Add

(hex)

NAME

R/W

D7

D6

D5

D4

D3

D2

D1

D0

00

CTL0

R/W

DVS SLEW RATE

FREQUENCY

Reserved

(18)

PWRON_DEBOUNCE_

TIMER

Reserved

01

CTL1

R/W

RSTO_MODE

RSTO_DELAY

RSTO_PFI_THLD

Reserved

02

CTL2

R/W

Reserved

Reserved

TIME_SLOT

PWR_ON_

TIME_SLOT

_MODE

PWR_OFF_

TIME_SLOT

_MODE

03

Buck 1

R/W

BUCK1_VREF: 0.4V to 3.5875V/12.5mV step or 0.4V to 2.2V/7.4mV step

04

R/W

Reserved

OVPEN1

DISCHGEN1

MODEBUCK1

Reserved

05

R/W

ILIM1

PHASE_DELAY1

SOFTSTART1

Reserved

06

R/W

POWER_OFF_SLOT_NO_B1

POWER_ON_SLOT_NO_B1

07

Buck 2

R/W

BUCK2_VREF: 0.4V to 3.5875V/12.5mV step or 0.4V to 2.2V/7.4mV step

08

R/W

Reserved

OVPEN2

DISCHGEN2

MODEBUCK2

RESERVED

09

R/W

ILIM2

PHASE_DELAY2

SOFTSTART2

Reserved

0A

R/W

POWER_OFF_SLOT_NO_B2

POWER_ON_SLOT_NO_B2

0B

Buck 3

R/W

BUCK3_VREF: 0.4V to 3.5875V/12.5mV step or 0.4V to 2.2V/7.4mV step

0C

R/W

Reserved

OVPEN3

DISCHGEN3

MODEBUCK3

Reserved

0D

R/W

ILIM3

PHASE_DELAY3

SOFTSTART3

Reserved

0E

R/W

POWER_OFF_SLOT_NO_B3

POWER_ON_SLOT_NO_B3

0F

Buck 4

R/W

BUCK4_VREF: 0.4V to 3.5875V/12.5mV step

10

R/W

RESERVED

OVPEN4

DISCHGEN4

MODEBUCK4

Reserved

11

R/W

ILIM4

PHASE_DELAY4

SOFTSTART4

RESERVED

12

R/W

POWER_OFF_SLOT_NO_B4

POWER_ON_SLOT_NO_B4

13

CTL3

R/W

RESERVED

EN1_SELECT

EN_OFF_

DELAY

EN_OFF_

MODE

BUCK3_

VID

BUCK2_

VID

BUCK1_VID

14

LDO 2

R/W

LDO2_VREF: 0.65V to 3.5875V/12.5mV step

15

R/W

Reserved

Reserved

DISCHGEN_

LDO2

I2C_SLAVE_ADDRESS

16

R/W

POWER_OFF_SLOT_NO_LDO2

POWER_ON_SLOT_NO_LDO2

17

LOAD_

SW

R/W

Reserved

18

R/W

Reserved

Reserved

DISCHGEN_

LDSW

Reserved

Reserved

19

R/W

POWER_OFF_SLOT_NO_LDSW

POWER_ON_SLOT_NO_LDSW

1A

LDO 4

R/W

LDO4_VREF: 0.65V to 3.5875V/12.5mV step

1B

R/W

Reserved

ILIM_LDO4

DISCHGEN_

LDO4

Reserved

Reserved

1C

R/W

POWER_OFF_SLOT_NO_LDO4

POWER_ON_SLOT_NO_LDO4

1D

LDO 5

R/W

LDO5_VREF: 0.65V to 3.5875V/12.5mV step

1E

R/W

Reserved

ILIM_LDO5

DISCHGEN_

LDO5

Reserved

RESERVED

1F

R/W

POWER_OFF_SLOT_NO_LDO5

POWER_ON_SLOT_NO_LDO5

20

Parallel

Mode

R/W

PARALLEL_1

(17)

PARALLEL_2

(17)

PWRON_

MODE (17)

EN_EN1_

PIN (17)

RESERVED

21

Standby 1

R/W

EN1_INV (17)

EN1_POWER_RAILS_CONTROL(17)

22

EN

R/W

EN_BUCK1

EN_BUCK2

EN_BUCK3

EN_BUCK4

EN_LDO2

EN_

LDSW

EN_LDO4

EN_LDO5

23

MTP_CTL

R/W

MTP configure code ("0x00" for standard MP5424-0000, "0x01" for MP5424-0001)

24

R/W

MTP revision number (MTP revision number is stored here, in case the user must update the MTP)

25

R/W

ENTER_MTP_

MODE

PROGRAM_

MTP (18)

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

26

W

MTP Program Password

27

Status 1

R

PGLDO4

Reserved "1"

PGLDO2

Reserved "1"

PGBUCK4

PG

BUCK3

PGBUCK2

PGBUCK1

28

Status 2

R

OTWARNING

OTEMPP

Reserved

CHECKSUM

FLAG

Reserved

Reserved

Reserved

Reserved

29

ID2

R

VENDOR ID

Reserved

PGLDO5

CURRENT MTP PAGE

INDEX

Notes:

17) The I2C bits do not control the real circuitry. Only the MTP bits control those functions. The MTP value only reloads the circuitry when the

PWRON pin turns off, the MTP is configured, or AVIN > UVLO threshold.

18) Reserved bits must be written to 0.

Register Description