EV5424-R-00A datasheet(29/44 Pages) MPS

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MP5424

– 5V POWER MANAGEMENT IC WITH I2C AND MTP

MP5424 Rev. 1.0

MonolithicPower.com

12/6/2021

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

Name

Bits

Default

Description

BUCK1_VREF,

BUCK2_VREF,

BUCK3_VREF,

BUCK4_VREF,

LDO2_VREF,

LDO4_VREF,

LDO5_VREF

D[7:0]

00110100,

00110011,

00110100,

01001100,

01110000,

11101000,

11101000

Sets the internal reference voltage (VREF). Buck outputs are between 400mV and

3587.5mV with 12.5mV per step. LDO outputs are from 650mV to 3587.5mV with

12.5mV per step. See Table 1 on page 32 for more details.

0000 0000: 400mV

0000 0001: 412.5mV

...

1111 1111: 3587.5mV

If the Buck1_VID, Buck2_VID, and Buck3_VID bits are set to 1, then the buck 1,

buck 2, and buck 3 VOUT range is between 400mV and 2.2V with a 7.4mV per step.

OVPEN1,

OVPEN2,

OVPEN3,

OVPEN4

D[6]

Enable bit for buck 1, buck 2, buck 3, and buck 4 output over-voltage protection

(OVP).

0: OVP disabled

1: OVP enabled

DISCHGEN1,

DISCHGEN2,

DISCHGEN3,

DISCHGEN4

D[5]

Enable bit for buck 1, buck 2, buck 3, and buck 4 output discharge function.

0: Discharge function disabled

1: Discharge function enabled

MODEBUCK1,

MODEBUCK2,

MODEBUCK3,

MODEBUCK4

D[4]

Selects auto-PFM/PWM mode or forced pulse-width modulation (FPWM) mode.

0: Auto-PFM/PWM mode

1: Forced PWM mode (FPWM)

ILIM1, ILIM3

D[7:6]

Configures the high-side MOSFET (HS-FET) peak current limit (ILIMIT_PEAK) for

buck 1 and buck 3.

00: 4.6A typical HS-FET ILIMIT_PEAK

01: 6.6A typical HS-FET ILIMIT_PEAK

10: 7.6A typical HS-FET ILIMIT_PEAK

11: 9.3A typical HS-FET ILIMIT_PEAK

ILIM2, ILIM4

D[7:6]

Configures the HS-FET ILIMIT_PEAK for buck 2 and buck 4.

00: 2.7A typical HS-FET ILIMIT_PEAK

01: 3.9A typical HS-FET ILIMIT_PEAK

10: 5.1A typical HS-FET ILIMIT_PEAK

11: 6.1A typical HS-FET ILIMIT_PEAK

PHASE_

DELAY1,

PHASE_

DELAY2,

PHASE_

DELAY3,

PHASE_

DELAY4

D[5:4]

00, 01, 01,

Sets the phase delay for buck 1, buck 2, buck 3, and buck 4.

00: 0° delay

01: 90° delay

10: 180° delay

11: 270° delay

SOFTSTART1,

SOFTSTART2,

SOFTSTART3,

SOFTSTART4

D[3:2]

Soft-start time (tSS) setting bit for buck 1, buck 2, buck 3, and buck 4. tSS is

between 10% and 90% of the target VOUT.

00 :150μs

01: 300μs

10: 610μs

11: 920μs

EV5424-R-00A 数据表(PDF) 29 Page - Monolithic Power Systems

EV5424-R-00A 数据表(HTML) 29 Page - Monolithic Power Systems

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EV5424-R-00A 数据表(PDF) 29 Page - Monolithic Power Systems

EV5424-R-00A 数据表(HTML) 29 Page - Monolithic Power Systems

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