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EV5424-R-00A 数据表(PDF) 10 Page - Monolithic Power Systems

部件名 EV5424-R-00A
功能描述  5V PMIC with Four 4.5A/2.5A/4.5A/2A Buck Converters, 3 LDOs, 1 Load Switch, and Flexible System Settings via I2C and MTP
PDF  44 Pages
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制造商  MPS [Monolithic Power Systems]
网页  http://www.monolithicpower.com
标志 MPS - Monolithic Power Systems

EV5424-R-00A 数据表(HTML) 10 Page - Monolithic Power Systems

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MP5424
– 5V POWER MANAGEMENT IC WITH I2C AND MTP
MP5424 Rev. 1.0
MonolithicPower.com
10
12/6/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS (continued)
VIN1 = VIN2 = VIN3 = VIN4 = VIN5 = VAVIN = 5V, TJ = -40°C to +125°C (11), typical values are tested at
TJ = 25°C, unless otherwise noted. (12)
Parameter
Symbol
Condition
Min
Typ
Max
Units
I2C Interface Specifications (14)
Input logic high
VIN_HIGH
1.4
V
Input logic low
VIN_LOW
0.4
V
Output voltage logic low
VOUT_LOW
RSTO pin, 4mA sink
0.4
V
SCL clock frequency
fSCL
3.4
MHz
SCL high time
tHIGH_SCL
60
ns
SCL low time
tLOW_SCL
160
ns
Data setup time
tSU_DATA
10
ns
Data hold time
tHD_DATA
70
ns
Set-up time for repeated
start
tSU.START
160
ns
Hold time for repeated start
tHOLD.START
160
ns
Bus free time between a
start and a stop condition
tBUS_FREE
160
ns
Set-up time for stop
condition
tSU_STOP
160
ns
Rise time of SCL and SDA
tRISE
10
300
ns
Fall time of SCL and SDA
tFALL
10
300
ns
Suppressed spike pulse
width
tSPIKE
0
50
ns
Capacitance for each bus
line
CBUS
400
pF
Notes:
11) Guaranteed by over-temperature correlation. Not tested in production.
12) Tested with default version (MP5424GRM-0000), unless otherwise noted.
13) Guaranteed by engineering sample characterization.
14) It is recommended to use I2C function after the start-up sequence is complete (e.g. all enabled power rails have completed start up). Figure
2 shows the I2C timing diagram for reading the I2C interface specifications.
I2C TIMING DIAGRAM
Figure 2: I2C Timing Diagram



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