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EV5424-R-00A 数据表(PDF) 41 Page - Monolithic Power Systems |
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EV5424-R-00A 数据表(HTML) 41 Page - Monolithic Power Systems |
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41 / 44 page ![]() MP5424 – 5V POWER MANAGEMENT IC WITH I2C AND MTP MP5424 Rev. 1.0 MonolithicPower.com 41 12/6/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUITS (continued) MP5424 VIN1 GND1 PWRON SCL SW1 FB1 LSWI LSWO /EN1 OUT2 VIN1 = 2.7V to 5.5V VOUT1 = 1.05V C1 22µF L1 C6 22µF x 4 1µH SW2 FB2 L2 C7 22µF x 2 1.5µH SW3 SW4 FB4 L4 C9 22µF x 2 VIN2 GND2 C2 22µF VIN3 C3 22µF VIN4 C4 22µF VOUT 3.3V/ 5V 10µF C10 10µF C15 VIN5 2.2µF C14 OUT5 3.3V 2.2µF C13 OUT4 3.3V RSTO AVIN C5 0.1µF AGND SDA VOUT2 = 1.0375V VOUT4 = 1.35V 1.5µH R1 100k 3.3V VIN5: 5V R2 . Ω 10µF C11 2.2µF C12 1.8V 3 5 20 18 7 16 26 25 24 23 22 11 10 15 17 21 19 1 4 2 9 12 14 13 FB3 8 6 Figure 19: Typical Application Circuit (with Buck 1 and Buck 3 in Parallel) (21) (22) Notes: 21) VIN5’s minimum V IN is equal to the maximum nominal VOUT of LDO 4 and LDO 5. Connect the VIN5 and VIN1 pins if LDO 4 and LDO 5 are not used. 22) If operating at a 2.2MHz fSW and with a small duty cycle, ensure that the buck’s on time is >100ns for increased system stability. |
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