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M58LR128KB 数据表(PDF) 48 Page - Numonyx B.V

部件名 M58LR128KB
功能描述  128 or 256 Mbit (횞16, multiple bank, multilevel interface, burst) 1.8 V supply Flash memories
PDF  110 Pages
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制造商  NUMONYX [Numonyx B.V]
网页  http://www.numonyx.com
标志 NUMONYX - Numonyx B.V

M58LR128KB 数据表(HTML) 48 Page - Numonyx B.V

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Read modes
M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB
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7.2.1
Synchronous burst read suspend
A synchronous burst read operation can be suspended, freeing the data bus for other higher
priority devices. It can be suspended during the initial access latency time (before data is
output) or after the device has output data. When the synchronous burst read operation is
suspended, internal array sensing continues and any previously latched internal data is
retained. A burst sequence can be suspended and resumed as often as required as long as
the operating conditions of the device are met.
A synchronous burst read operation is suspended when Chip Enable, E, is Low and the
current address has been latched (on a Latch Enable rising edge or on a valid clock edge).
The Clock signal is then halted at VIH or at VIL, and Output Enable, G, goes High.
When Output Enable, G, becomes Low again and the Clock signal restarts, the
synchronous burst read operation is resumed exactly where it stopped.
WAIT reverts to high-impedance when Chip Enable, E, or Output Enable, G, goes High.
See Table 25: Synchronous read AC characteristics and Figure 13: Synchronous burst read
suspend AC waveforms for details.
7.3
Single synchronous read mode
Single synchronous read operations are similar to synchronous burst read operations
except that the memory outputs the same data to the end of the operation.
Synchronous single reads are used to read the electronic signature, Status Register, CFI,
block protection status, Configuration Register Status or the Protection Register. When the
addressed bank is in read CFI, read Status Register or read electronic signature mode, the
WAIT signal is asserted during the X latency, the WAIT state and at the end of a 4, 8 and 16
word burst. It is only de-asserted when output data are valid.
See Table 25: Synchronous read AC characteristics and Figure 12: Single synchronous
read AC waveforms for details.



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