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M58LR128KB 数据表(PDF) 63 Page - Numonyx B.V

部件名 M58LR128KB
功能描述  128 or 256 Mbit (횞16, multiple bank, multilevel interface, burst) 1.8 V supply Flash memories
PDF  110 Pages
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制造商  NUMONYX [Numonyx B.V]
网页  http://www.numonyx.com
标志 NUMONYX - Numonyx B.V

M58LR128KB 数据表(HTML) 63 Page - Numonyx B.V

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M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB
DC and AC parameters
63/111
Table 24.
Asynchronous read AC characteristics
Symbol
Alt
Parameter
M58LRxxxKT/B
Unit
70
85
tAVAV
tRC
Address Valid to Next Address Valid
Min
70
85
ns
tAVQV
tACC
Address Valid to Output Valid (Random)
Max
70
85
ns
tAVQV1
tPAGE
Address Valid to Output Valid (page)
Max
20
25
ns
tAXQX
(1)
1.
Sampled only, not 100% tested.
tOH
Address Transition to Output Transition
Min
0
0
ns
tELTV
Chip Enable Low to Wait Valid
Max
11
14
ns
tELQV
(2)
2.
G may be delayed by up to tELQV - tGLQV after the falling edge of E without increasing tELQV.
tCE
Chip Enable Low to Output Valid
Max
70
85
ns
tELQX
(1)
tLZ
Chip Enable Low to Output Transition
Min
0
0
ns
tEHTZ
Chip Enable High to Wait Hi-Z
Max
11
14
ns
tEHQX
(1)
tOH
Chip Enable High to Output Transition
Min
2
2
ns
tEHQZ
(1)
tHZ
Chip Enable High to Output Hi-Z
Max
14
14
ns
tGLQV
(2)
tOE
Output Enable Low to Output Valid
Max
20
20
ns
tGLQX
(1)
tOLZ
Output Enable Low to Output Transition
Min
0
0
ns
tGLTV
Output Enable Low to Wait Valid
Max
14
14
ns
tGHQX
(1)
tOH
Output Enable High to Output Transition
Min
2
2
ns
tGHQZ
(1)
tDF
Output Enable High to Output Hi-Z
Max
14
14
ns
tGHTZ
Output Enable High to Wait Hi-Z
Max
14
14
ns
tAVLH
tAVADVH Address Valid to Latch Enable High
Min
7
7
ns
tELLH
tELADVH Chip Enable Low to Latch Enable High
Min
10
10
ns
tLHAX
tADVHAX Latch Enable High to Address Transition
Min
7
7
ns
tLLLH
tADVLADVH Latch Enable Pulse Width
Min
7
7
ns
tLLQV
tADVLQV
Latch Enable Low to Output Valid
(Random)
Max
70
85
ns



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