M58LR128KB datasheet(90/110 Pages) NUMONYX

90 / 110 page

Common Flash interface

M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

90/111

(P+3F)h = 149h

03h

(P+47)h = 151h

03h

Bank Region 2 (Erase Block Type 1):Page

mode and Synchronous mode capabilities

(defined in Table 48)

Bit 0: Page-mode reads permitted(5)

Bit 1: Synchronous reads permitted

Bit 2: Synchronous writes permitted

Bits 3-7: reserved

(P+40)h = 14Ah

03h

Bank Region 2 Erase Block Type 2 Information

Bits 0-15: n+1 = number of identical-sized

erase blocks

Bits 16-31: n×256 = number of bytes in erase

block region

(P+41)h = 14Bh

00h

(P+42)h = 14Ch

80h

(P+43)h = 14Dh

00h

(P+44)h = 14Eh

64h

Bank Region 2 (Erase Block Type 2)

Minimum block erase cycles × 1000

(P+45)h = 14Fh

00h

(P+46)h = 150h

01h

Bank Region 2 (Erase Block Type 2): BIts per

cell, internal ECC

Bits 0-3: bits per cell in erase region

Bit 4: reserved for “internal ECC used”

BIts 5-7: reserved

(P+47)h = 151h

03h

Bank Region 2 (Erase Block Type 2): Page

mode and Synchronous mode capabilities

(defined in Table 48)

Bit 0: Page-mode reads permitted

Bit 1: Synchronous reads permitted

Bit 2: Synchronous writes permitted

Bits 3-7: reserved

(P+48)h = 152h

Feature Space definitions

(P+49)h = 153h

(P+43)h = 153h

Reserved

The variable P is a pointer which is defined at CFI offset 015h.

Bank Regions. There are two bank regions, see Table 31, Table 34, Table 37 and Table 40.

Applies to M58LR128KT/B only.

Applies to M58LR256KT/B only.

Although the device supports Page Read mode, this is not described in the datasheet as its use is not

advantageous in a multiplexed device.

Table 51.

Bank and erase block region 2 information (continued)

Flash memory (top)

Flash memory (bottom)

Description

Offset(1)

Data

Offset(1)

Data

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