M58LR128KB datasheet(22/110 Pages) NUMONYX

22 / 110 page

Command interface

M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

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4.7

Blank Check command

The Blank Check command checks whether a main array block has been completely

erased. Only one block at a time can be checked. To use the Blank Check command VPP

must be equal to VPPH. If VPP is not equal to VPPH, the device ignores the command and no

error is shown in the Status Register.

Two bus cycles are required to issue the Blank Check command:

●

The first bus cycle writes the Blank Check command (BCh) to any address in the block

to be checked.

●

The second bus cycle writes the Blank Check Confirm command (CBh) to any address

in the block to be checked and starts the blank check operation.

If the second bus cycle is not Blank Check Confirm, Status Register bits SR4 and SR5 are

set to '1' and the command aborts.

Once the command is issued, the addressed bank automatically enters the Status Register

mode and further reads within the bank output the Status Register contents.

The only operation permitted during blank check is Read Status Register. Dual operations

are not supported while a blank check operation is in progress. Blank check operations

cannot be suspended and are not allowed while the device is in program/erase suspend.

The SR7 Status Register bit indicates the status of the blank check operation in progress.

SR7 = '0' means that the Blank Check operation is still ongoing, and SR7 = '1' means that

the operation is complete.

The SR5 Status Register bit goes High (SR5 = '1') to indicate that the blank check operation

has failed.

At the end of the operation the bank remains in the read Status Register mode until another

command is written to the command interface.

See Appendix C, Figure 19: Blank check flowchart and pseudocode for a suggested

flowchart for using the Blank Check command.

Typical blank check times are given in Table 18: Program/erase times and endurance

cycles.

M58LR128KB 数据表(PDF) 22 Page - Numonyx B.V