M58LR128KB datasheet(28/110 Pages) NUMONYX

28 / 110 page

Command interface

M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

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The Protection Register Program cannot be suspended. Dual operations between the

parameter bank and the Protection Register memory space are not allowed (see Table 16:

Dual operation limitations for details)

The two Protection Register locks protect the OTP segments from further modification. The

protection of the OTP segments is not reversible. Refer to Figure 4: Protection Register

memory map and Table 9: Protection Register locks for details on the lock bits.

See Appendix C, Figure 25: Protection Register program flowchart and pseudocode for a

flowchart for using the Protection Register Program command.

4.14

Set Configuration Register command

The Set Configuration Register command writes a new value to the Configuration Register.

Two bus write cycles are required to issue the Set Configuration Register comman:

●

The first cycle sets up the Set Configuration Register command and the address

corresponding to the Configuration Register content.

●

The second cycle writes the Configuration Register data and the confirm command.

The Configuration Register data must be written as an address during the bus write cycles,

that is A0 = CR0, A1 = CR1, …, A15 = CR15. Addresses A16-A22 are ignored.

Read operations output the array content after the Set Configuration Register command is

issued.

The Read Electronic Signature command is required to read the updated contents of the

Configuration Register.

4.15

Block Lock command

The Block Lock command locks a block and prevent program or erase operations from

changing the data in it. All blocks are locked after power-up or reset.

Two bus write cycles are required to issue the Block Lock command:

●

The first bus cycle sets up the Block Lock command.

●

The second bus write cycle latches the block address and locks the block.

The lock status can be monitored for each block using the Read Electronic Signature

command. Table 17 shows the lock status after issuing a Block Lock command.

Once set, the block lock bits remain set even after a hardware reset or power-down/power-

up. They are cleared by a Block Unlock command.

Refer to Section 9: Block locking for a detailed explanation. See Appendix C, Figure 24:

Locking operations flowchart and pseudocode for a flowchart for using the Lock command.

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