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M58LR128KB 数据表(PDF) 65 Page - Numonyx B.V |
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M58LR128KB 数据表(HTML) 65 Page - Numonyx B.V |
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65 / 110 page  M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB DC and AC parameters 65/111 Figure 12. Single synchronous read AC waveforms 1. Amax is equal to A22 in the M58LR128KT/B and, to A23 in the M58LR256KT/B. 2. Address latched and data output on the rising clock edge. Either the rising or the falling edge of the clock signal, K, can be configured as the active edge. Here, the active edge is the rising one. 3. The WAIT signal is configured to be active during wait state. WAIT signal is active Low. Ai14019 E G A0-Amax(1) L WAIT(3) K(2) VALID ADDRESS tGLQV tAVKH tLLKH tELKH Hi-Z tELQX tKHQV tGLQX tKHTV DQ0-DQ15 VALID Hi-Z tELQV tGLTV tGHTZ |
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