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M58LR128KB 数据表(PDF) 23 Page - Numonyx B.V |
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M58LR128KB 数据表(HTML) 23 Page - Numonyx B.V |
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23 / 110 page ![]() M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB Command interface 23/111 4.8 Program command The Program command programs a single word to the memory array. If the block being programmed is protected, then the program operation aborts, the data in the block does not change and the Status Register outputs the error. Two bus write cycles are required to issue the Program command: ● The first bus cycle sets up the Program command. ● The second latches the address and data to be programmed and starts the Program/Erase Controller. Once the programming has started, read operations in the bank being programmed output the Status Register content. During a program operation, the bank containing the word being programmed only accepts the Read Array, Read Status Register, Read Electronic Signature, Read CFI Query and the Program/Erase Suspend commands; all other commands are ignored. A Read Array command is required to return the bank to read array mode. Refer to Section 8: Dual operations and multiple bank architecture for detailed information about simultaneous operations allowed in banks not being programmed. Typical program times are given in Table 18: Program/erase times and endurance cycles. The program operation aborts if Reset, RP, goes to VIL. As data integrity cannot be guaranteed when the program operation is aborted, the word must be reprogrammed. See Appendix C, Figure 18: Program flowchart and pseudocode for the flowchart for using the Program command. 4.9 Buffer Program command The Buffer Program Command uses the device’s 32-word write buffer to speed up programming. Up to 32 words can be loaded into the write buffer. The Buffer Program command dramatically reduces in-system programming time compared to the standard non- buffered Program command. Four successive steps are required to issue the Buffer Program command: 1. The first bus write cycle sets up the Buffer Program command. The setup code can be addressed to any location within the targeted block. After the first bus write cycle, read operations in the bank output the contents of the Status Register. Status Register bit SR7 should be read to check that the buffer is available (SR7 = 1). If the buffer is not available (SR7 = 0), re-issue the Buffer Program command to update the Status Register contents. 2. The second bus write cycle sets up the number of words to be programmed. Value n is written to the same block address, where n+1 is the number of words to be programmed. |
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