ST52T400 datasheet(8/94 Pages) STMICROELECTRONICS

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ST52T400/T440/E440/T441

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1.2 Operational Description

ST52x400/440/441 ICU can work in two modes:

Memory Programming Phase

Working Phase

according to RESET and Vpp signals levels (see

pins description) .

Note: When RESET=0 it is advisable not to use

the sequence “101010“ to port PA ( 7 : 2 ).

1.2.1 Memory Programming Phase.

The ST52x400/440/441 memory is loaded in the

Memory Programming Phase. All fuzzy and stan-

dard instructions are written inside the memory.

This phase starts by setting the control signals as

illustrated in (see Table 1.1).

When this phase starts, the ST52x400/440/441

core is set

RESET status; then 12V are

applied to the Vpp pin in order to start EPROM

programming. A signal applied to PB1 is used to

increment the memory address; the data is sup-

plied to PORT A (see EPROM programming for

further details).

1.2.2 Working Mode.

The processor starts the working phase following

the instructions, which have been previously

loaded in the memory.

ST52x400/440/441’s internal structure includes a

computational block, CONTROL UNIT (CU)/DATA

PROCESSING UNIT (DPU), which allows pro-

cessing of boolean functions and fuzzy algo-

rithms.

The CU/DPU can manage up to 334 different

Membership Functions for the fuzzy rules ante-

cedent part. The rule consequents are “crisp” val-

ues (real numbers). The maximum number of

rules that can be defined is limited by the dimen-

sions of the implemented standard algorithm.

EPROM is then shared between fuzzy and stan-

dard algorithms. The Membership Function data is

stored inside the first 1024 memory locations. The

Fuzzy rules are parts of the program instructions.

The Control Unit (CU) reads the information and

the status deriving from the peripherals.

Arithmetic calculus can be performed on these

values by using the internal CU and the 128/256

bytes of RAM, which supports all computations.

The peripheral input can be fuzzy and/or arith-

metic output, or the values contained in Data RAM

and EPROM locations.

Table 1.1

Control Signals Setting

Control

Signal

Pro-

gramming

Reset

Working

RESET

Vpp

5V /12V

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