ST52T400 datasheet(46/94 Pages) STMICROELECTRONICS

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ST52T400/T440/E440/T441

46/94

6I/O PORTS

6.1 Introduction

ST52x400/440/441 devices offer flexible individu-

ally programmable multi-functional input/output

lines. Refer to Chapter 1 for specific pin alloca-

tions.

21 I/O lines, grouped in 3 different ports, are avail-

able for ST52x400G/440G/441G devices:

PORT A = 8-bit ports (PA0 - PA7 pins)

PORT B = 8-bit ports (PB0 - PB7 pins)

PORT C = 5-bit port (PC0 - PC4 pins)

13 I/O lines, grouped in 2 different ports are avail-

able for ST52x400F/440F/441F devices:

PORT A = 8-bit ports (PA0 - PA7 pins)

PORT B = 5 -bit ports (PB0 - PB3 and PB7 pins)

These I/O lines can be programmed to provide

Digital Input/Output or Analog Input, or to connect

input/output signals to the on-chip peripherals as

Alternate Pin Functions.

The input buffers are TTL compatible with Schmitt

Trigger in ports A and C while port B is CMOS

compatible without Schmitt trigger and it is used

for the Analog Inputs.

The output buffer can supply up to 8 mA.

All the port pins of 400/440 devices have an

internal pull-up resistor (22 k

Ω). The 441 device

doesn’t have internal pull-up resistor. This

pull-up

resistor

automatically

excluded

when the pin is configured as Analog Input or,

in MAIN1 and MAIN2 pins,

when the Triac

Driver is configured in Phase Angle Partializa-

tion or Burst mode.

Each single port pin can be programmed in input

or output or Alternate Function, so that in the

same port there can be both input and output pins.

The port pins are write/read in parallel at the same

time: when reading output pins, the port buffer

contents are read; when writing an input pin the

value is written in the buffer.

Each port is configured by using Configuration

Registers indicated in Table 6.1. The first is used

to define if a pin is an Input or an Output, the sec-

ond defines the Alternate functions.

(*)

Not available in ST52x400F/440F/441F

(**) Only in ST52x440F/441F

Table 6.1 I/O Port Configuration Register

PORT A

PORT B

PORT C (*)

Reg_Conf 4

Reg_Conf 13

Reg_Conf 11

Reg_Conf 12

Reg_Conf 14

Reg_Conf 11**

Figure 6.1 Ports A and C Functional Blocks

TTL

PORT A PIN

or PORT C PIN

TO INPUT REGISTER

and PERIPHERALS

FROM PERIPHERAL

FROM OUTPUT REGISTER

FROM CONFIGURATION REGISTER

Vcc

22 k

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