ST52T400 datasheet(56/94 Pages) STMICROELECTRONICS

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ST52T400/T440/E440/T441

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9 PWM/TIMER

ST52x400/440/441 on-chip PWM/TIMER periph-

erals consist of an 8-bit counter with a 16-bit pro-

grammable prescaler that provide a maximum

count of 224 (Figure 9.1).

The TIMER has two different working modes:

Timer Mode

PWM (Pulse Width Modulation) Mode that can

be selected by setting register REG_CONF5[7]

bit TMODE.

The Timer has an Autoreload Function in PWM

Mode. Its output TOUT is available, with its com-

plementary signal TOUTN on external pins by set-

ting PA6 and PA2 bits of REG_CONF4 and

REG_CONF12 (see tables - Port A - REG_CONF

4 and - Port A - REG_CONF 12).

TheTIMER canalsouse an external START/

STOP signal (Input capture), an external RESET

and external CLOCK signals: PA4/TSTRT, PA6/

TRES and PA5/TCLK pins. To use TSTRT, TRES,

TCLK external signals the related pins PA4, PA6

and PA5 must be configured in Input Mode by set-

ting registers REG_CONF4 and REG_CONF12

(see table - Port A - REG_CONF 4 and - Port A -

REG_CONF 12).

The content of the 8-bit counter of the TIMER is

incremented on the Rising Edge of the 16-bit pres-

caler output (PRESCOUT) and it can be read at

any instant of the counting phase, which is then

saved in a RAM memory location. The PWM/

Timer Counter value can be read from the Input

Table 2.1). The PWM/Timer Status can be read

from the Input Register PWM_STATUS (Input

Registers 19. See Table 2.1). This register indi-

cates if the TIMER is in START/STOP (bit 1) and

in SET/RESET bit(0).

9.1 Timer Mode

Timer Mode is selected by setting the TxMODE bit

of REG_CONF5[7].

The TIMER can receive three signals as inputs:

Timer Clock (TCLK), Timer Reset (TRES) and

Timer Start (TSTRT) (Figure 9.1). Each of these

signals can be generated internally or externally

setting

TSTR,

TRST,

TCLK

bits

REG_CONF7 register as illustrated in Table 9.3.

TMRCLK is the Prescaler output, which incre-

ments the Counter value on the rising edge. TMR-

CLK is obtained from the internal clock signal

(CLKM) or from the external signal provided on

the PA5/TCLK pin.

NOTE:

The external clock signal, applied on

TCLK pin, must have a frequency, which is at least

two times smaller than the internal master clock.

The prescaler output can be selected by setting

PRESC bits of REG_CONF6 register (Table 9.2).

TRES resets the content of the TIMER 8-bit

counter to zero. It is generated internally by set-

ting the TIRST bit of REG_CONF5(Table 9.1).

TSTRT signal starts and stops the Timer counting

only if the peripheral is configured in Timer mode.

It is generated internally by setting the TSTR bit of

REG_CONF5(Table 9.1).

TIMER START/STOP can be provided externally

from the TSTRT pin (Input Capture). In this case,

TSTRT signal allows the ICU to work in two differ-

ent modes by setting the TESTR configuration bit

of REG_CONF5 register.

LEVEL: When the TSTRT signal is high the Timer

starts counting. When the TSTRT is low the count-

ing stops and the current value is stored in the

PWMCOUNT Input Register.

Figure 9.1 Timer Peripheral Block Diagram

BIT0

BIT1

BIT2

BIT3

BIT4

BIT5

BIT14

BIT15

BIT3

BIT0

BIT1

BIT2

BIT6

BIT4

BIT5

BIT7

17- 1MULTIPLEXER

16-BITPRESCALER

8-BITCOUNTER

PRESCx

CLKM

TMRCLK

TxRES

TxSTRT

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